Liquid crystal display

• US 8,477,253 B2
• Filed: 05/04/2009
• Issued: 07/02/2013
• Est. Priority Date: 12/09/2008
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kim, Yoon-Jang, Kim, Dong-Gyu, Kwon, Yeong-Keun, Park, Kee-Bum, Cho, Eung
• Primary Examiner(s): Won, Bumsuk
• Assistant Examiner(s): CHANG, CHARLES S
• Application Number:
  US12/435,309
• Publication Number:
  US 20100141860A1
• Time in Patent Office: 1,520 Days
• Field of Search: 349/48, 349106-111, 349 38- 39
• US Class Current: 349/48
• CPC Class Codes: G02F 1/133514 Colour filters
• CPC Class Codes: G02F 1/134363 for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
• CPC Class Codes: G02F 1/13606 having means for reducing parasitic capacitance
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136222 Colour filters incorporated in the active matrix substrate
• CPC Class Codes: G02F 1/13624 having more than one switching element per pixel

Abstract

A liquid crystal display according to an embodiment of the present invention includes: a first substrate; a plurality of color filters formed on the first substrate and arranged in a matrix with an island shape; a plurality of pixel electrodes formed on the color filters; and a capacitor disposed between neighboring color filters in a column direction among the color filters, wherein two terminals forming the capacitor are disposed at a portion outside a position overlapping the color filters.

Claims

1. A liquid crystal display comprising:

a first substrate;

a plurality of color filters formed with an island shape on the first substrate and arranged in a matrix;

a plurality of pixel electrodes formed on the color filters; and

a capacitor disposed between neighboring color filters in a column direction among the color filters,

wherein two terminals forming the capacitor are disposed at a portion substantially outside a position overlapping the color filters,

wherein each of the pixel electrodes comprises a first subpixel electrode and a second subpixel electrode, and

wherein the liquid crystal display further comprising;

a plurality of first thin film transistors connected to the first subpixel electrodes;

a plurality of second thin film transistors connected to the second subpixel electrodes;

a plurality of third thin film transistors connected to the second subpixel electrodes;

a plurality of first gate lines connected to the first and the second thin film transistors;

a plurality of data lines connected to the first and the second thin film transistors; and

a plurality of second gate lines connected to the third thin film transistors.

2. The liquid crystal display of claim 1, wherein

the first and the second gate lines are disposed between the neighboring color filters in the column direction among the color filters.

3. The liquid crystal display of claim 2, wherein the first and the second gate lines are disposed outside a portion overlapping the pixel electrodes.

4. The liquid crystal display of claim 2, wherein the capacitor is connected to the second subpixel electrode through the third thin film transistor.

5. The liquid crystal display of claim 2, wherein the capacitor is connected to the second subpixel electrode through the third thin film transistor.

6. The liquid crystal display of claim 1, wherein the first and the second gate lines are disposed outside a portion overlapping the pixel electrodes.

7. The liquid crystal display of claim 5, wherein the first and the second gate lines are disposed outside a portion overlapping the pixel electrodes.

8. The liquid crystal display of claim 1, wherein the capacitor is connected to the second subpixel electrode through the third thin film transistor.

9. A liquid crystal display comprising:

a first substrate;

a plurality of color filters formed with an island shape on the first substrate and arranged in a matrix;

a plurality of pixel electrodes formed on the color filters; and

a capacitor disposed between neighboring color filters in a column direction among the color filters,

wherein two terminals forming the capacitor are disposed at a portion substantially outside a position overlapping the color filters,

wherein each of the pixel electrodes comprises a first subpixel electrode and a second subpixel electrode, and

wherein the liquid crystal display further comprising;

a plurality of first thin film transistors connected to the first subpixel electrodes;

a plurality of second thin film transistors connected to the second subpixel electrodes;

a plurality of third thin film transistors connected to the second subpixel electrodes;

a plurality of first gate lines connected to the first thin film transistors;

a plurality of data lines connected to the first and the second thin film transistors; and

a plurality of second gate lines connected to the third thin film transistors.

10. The liquid crystal display of claim 9, wherein the first and the second gate lines are disposed between the neighboring color filters in the column direction among the color filters.

11. The liquid crystal display of claim 10, wherein the first and the second gate lines are disposed outside a portion overlapping the pixel electrodes.

12. The liquid crystal display of claim 11, wherein the capacitor is connected to the second subpixel electrode through the third thin film transistor.

13. The liquid crystal display of claim 10, wherein the capacitor is connected to the second subpixel electrode through the third thin film transistor.

14. The liquid crystal display of claim 9, wherein the first and the second gate lines are disposed outside a portion overlapping the pixel electrodes.

15. The liquid crystal display of claim 13, wherein the first and the second gate lines are disposed outside a portion overlapping the pixel electrodes.

16. The liquid crystal display of claim 9, wherein the capacitor is connected to the second subpixel electrode through the third thin film transistor.