Processor system and fault managing unit thereof
First Claim
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1. A processor system, comprising:
- a processor core;
a plurality of modules coupled to the processor core and configured to generate respective fault signals, the plurality of modules including a first module configured to generate a first fault signal and a second module configured to generate a second fault signal; and
a fault managing unit coupled to the processor core and to the plurality of modules,the fault managing unit including;
an input module configured to receive the first and second fault signals generated by the second module of the plurality of modules; and
a diagnosis and reaction module configured to analyze the first fault signal and the second fault signal, generate a first reaction signal and a second reaction signal, and selectively transmit the first and second reaction signals to the processor core and the first module.
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Abstract
A processor system having a processor core, a plurality of modules connected to the processor core and configured to generate respective fault signals, and a fault managing unit connected to the processor core and to the plurality of modules. The fault managing unit is adapted to collect a first fault signal generated by a first module of the plurality of modules which is in a fault condition, analyze said collected first fault signal, and generate a first reaction signal to be selectively transmitted to said processor core and said first module.
12 Citations
30 Claims
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1. A processor system, comprising:
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a processor core; a plurality of modules coupled to the processor core and configured to generate respective fault signals, the plurality of modules including a first module configured to generate a first fault signal and a second module configured to generate a second fault signal; and a fault managing unit coupled to the processor core and to the plurality of modules, the fault managing unit including; an input module configured to receive the first and second fault signals generated by the second module of the plurality of modules; and a diagnosis and reaction module configured to analyze the first fault signal and the second fault signal, generate a first reaction signal and a second reaction signal, and selectively transmit the first and second reaction signals to the processor core and the first module. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A system, comprising
a processor core, a plurality of modules coupled to the processor core and configured to generate respective fault signals, the plurality of modules including a first module configured to generate a first fault signal when in a fault condition; -
an automotive apparatus configured to be controlled by said processor core; and a fault managing unit configured to; receive the first fault signal; analyze the first fault signal; generate a first reaction signal that includes at least one of an alarm signal and a command signal; if the first reaction signal includes the alarm signal, selectively transmit the alarm signal to said processor core and cause the processor core to recover the first module from the fault condition; and if the first reaction signal includes the command signal, selectively transmit the command signal to said first module and cause the first module to recover from the fault condition. - View Dependent Claims (15, 16)
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17. A circuit, comprising:
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an input module configured to be coupled to a core processor and to a plurality of operative modules including a first module configured to generate a first fault signal representing either a first fault condition or a second fault condition that is more critical than the first fault condition;
the input module configured to receive the first fault signal;a diagnosis and reaction module configured to analyze the first fault signal and to generate a first reaction signal having a criticality indicator that depends on whether the first fault signal represents the first fault condition or the second fault condition; and an output module coupled to the diagnosis and reaction module and configured to receive the first reaction signal and to selectively transmit the first reaction signal to the core processor and to the first module in accordance with the criticality data wherein; the circuit is configured to generate an alarm signal when the first fault signal represents the first fault condition and to generate a command signal when the fault signal represents the second fault condition. - View Dependent Claims (18, 19, 20)
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21. A processor system, comprising:
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a processor core; a plurality of modules coupled to the processor core and configured to generate respective fault signals, the plurality of modules including a first module configured to generate a first fault signal and a second module configured to generate a second fault signal; and a fault managing unit coupled to the processor core and to the plurality of modules, the fault managing unit configured to; receive the first fault signal; analyze the received first fault signal; and generate a first reaction signal to be selectively transmitted to said processor core and the first module, the first reaction signal includes one of the following signals; an alarm signal transmitted to the processor core, which is configured to recover the first module from a fault condition; a command signal transmitted to the first module and configured to recover the first module from a fault condition. - View Dependent Claims (22, 23, 24)
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25. A system, comprising
a processor core, a plurality of modules coupled to the processor core and configured to generate respective fault signals, the plurality of modules including a first module configured to generate a first fault signal and a second module configured to generate a second fault signal; -
an automotive apparatus configured to be controlled by the processor core; and a fault managing unit configured to; receive the first fault signal generated by the first module when in a fault condition; analyze the received first fault signal; and generate a first reaction signal in response to the analyzing the received first fault signal, the reaction signal configured to be selectively transmitted to the processor core and to the first module that is in the fault condition, the fault managing unit comprises; an input module configured to receive the first fault signal and at least the second fault signal generated by the second module of the plurality of modules; and a diagnosis and reaction module configured to analyze the first fault signal and the second fault signal and generate a first reaction signal and at least one second reaction signal. - View Dependent Claims (26, 27)
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28. A circuit, comprising:
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a core processor; a plurality of operative modules including a first module and a second module that are each configured to generate first and second fault signals, respectively, which selectively represent respectively a first fault condition and a second fault condition that is more critical than the first fault condition, an input module configured to be coupled to a core processor and to the input module and configured to receive fault signals generated by the plurality of operative modules, including the first and second fault signals; a diagnosis and reaction module configured to analyze the first fault signal received from the first module when the first module is in a fault condition and to generate a first reaction signal having a criticality data associated therewith; an output module coupled to the diagnosis and reaction module and configured to receive the first reaction signal and to selectively transmit the first reaction signal to the core processor and to the first module in the fault condition in accordance with the criticality data; and the circuit configured to generate an alarm signal when the first fault signal represents the first fault condition and to generate a command signal when the fault signal represents the second fault condition, the circuit configured to transition to an alarm state in which the alarm signal is generated, and the core processor configured to generate a safety signal in response to the first module recovering from the fault condition. - View Dependent Claims (29, 30)
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Specification