Tracking array data contents across three-valued read and write operations

• US 8,478,574 B2
• Filed: 04/30/2010
• Issued: 07/02/2013
• Est. Priority Date: 04/30/2010
• Status: Expired due to Fees

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Baumgartner, Jason R., Case, Michael L., Kanzelman, Robert L., Mony, Hari
• Primary Examiner(s): Alhija, Saif
• Assistant Examiner(s): LUU, CUONG V
• Application Number:
  US12/771,479
• Publication Number:
  US 20110270597A1
• Time in Patent Office: 1,159 Days
• Field of Search: 703/14, 703/15, 703/16, 703/22, 703/13, 716/116
• US Class Current: 703/14
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

A mechanism is provided in an integrated circuit simulator for tracking array data contents across three-value read and write operations. The mechanism accounts for write operations with data values and address values having X symbols. The mechanism performs writes to a tree data structure that is used to store the three-valued contents to the array. The simulator includes functionality for updating the array contents for a three-valued write and to read data for a three-valued read. The simulator also includes optimizations for dynamically reducing the size of the data structure when possible in order to save memory in the logic simulator.

Claims

1. A method, in a data processing system, for tracking array data contents across three-value read and write operations in a simulation of an integrated circuit design, the method comprising:

receiving, in the data processing system, an integrated circuit design having a memory array;

initializing, by the data processing system, a tree data structure for the memory array having a root node assigning a default value to all data bits, wherein initializing the tree data structure for the memory array comprises creating the root node having a non-deterministic address having a non-deterministic value for all address bits, wherein the non-deterministic address represents a set of addresses, and a data value equal to a default value; and

responsive to a write operation writing a write data value to a write address, updating, by the data processing system, the tree data structure to track memory array contents.

2. The method of claim 1, wherein the default value comprises a zero value for all data bits.

3. The method of claim 1, wherein updating the tree data structure comprises:

responsive to the write address being equal to an address of a given node, updating a data value at the given node.

4. The method of claim 3, wherein updating the data value at the given node comprises:

responsive to the write address being a minterm address, setting a data value of the given node to be equal to the write data value; and

responsive to the write address not being a minterm address, resolving the data value to form a resolved data value and setting the data value of the given node to be equal to the resolved data value.

5. The method of claim 4, wherein resolving a data value comprises:

determining a tightest cube that contains the write data value and the data value of the given node.

6. The method of claim 1, wherein updating the tree data structure comprises:

responsive to the write address being a non-deterministic address having addresses represented by a non-deterministic address of a given node, creating a new child node beneath the given node, wherein an address of the new child node is equal to the addresses represented by the non-deterministic address of the given node and wherein a data value of the new child node is equal to data of the given node; and

updating the data value at the new child node.

7. The method of claim 6, wherein updating the data value at the new child node comprises:

responsive to the write address being a minterm address, setting a data value of the new child node to be equal to the write data value; and

responsive to the write address not being a minterm address, resolving a data value to form a resolved data value and setting the data value of the new child node to be equal to the resolved data value.

8. The method of claim 7, wherein resolving the data value comprises:

determining a tightest cube that contains the write data value and the data value of the new child node.

9. The method of claim 1, wherein updating the tree data structure comprises:

for a given node in the tree data structure and for all addresses to be written to the given node, determine an intersection of the addresses to be written and an address of each child node of the given node;

responsive to the intersection not being null for a given child node of the given node, performing a write operation to the given child node based on the intersection for the given child node and the write data value.

10. The method of claim 1, further comprising:

cleaning up the tree data structure, wherein cleaning up the tree data structure comprises;

for each given node in the tree data structure having a data value equal to a data value of a child node of the given node, adding children of the child node to the given node and deleting the child node.

11. The method of claim 1, further comprising:

responsive to a read operation reading a read data value from a read address, traversing the tree data structure to identify each node with an address that intersects the read address;

for each identified node, performing a subread to form one or more subreads; and

resolving all vectors in the one or more subreads to form a read data value.

12. A computer program product comprising a computer readable storage medium having a computer readable program stored therein, wherein the computer readable program, when executed on a computing device, causes the computing device to:

receive, in the computing device, an integrated circuit design having a memory array;

initialize, by the computing device, a tree data structure for the memory array having a root node assigning a default value to all data bits, wherein initializing the tree data structure for the memory array comprises creating the root node having a non-deterministic address having a non-deterministic value for all address bits, wherein the non-deterministic address defines a set of addresses, and a data value to a default value; and

responsive to a write operation writing a write data value to a write address, update, by the computing device, the tree data structure to track memory array contents.

13. The computer program product of claim 12, wherein updating the tree data structure comprises:

responsive to the write address being equal to an address of a given node, updating a data value at the given node.

14. The computer program product of claim 12, wherein updating the tree data structure comprises:

responsive to the write address being a non-deterministic address having addresses represented by a non-deterministic address of a given node, creating a new child node beneath the given node, wherein an address of the new child node is equal to the addresses represented by the non-deterministic address of the given node and wherein a data value of the new child node is equal to data of the given node; and

updating the data value at the new child node.

15. The computer program product of claim 12, wherein updating the tree data structure comprises:

for a given node in the tree data structure and for all addresses to be written to the given node, determine an intersection of the addresses to be written and an address of each child node of the given node;

responsive to the intersection not being null for a given child node, performing a write operation to the given child node based on the intersection for the given child node and the write data value.

16. The computer program product of claim 12, wherein the computer readable program further causes the computing device to:

responsive to a read operation reading a read data value from a read address, traverse the tree data structure to identify each node with an address that intersects the read address;

for each identified node, perform a subread to form one or more subreads; and

resolve all vectors in the one or more subreads to form a read data value.

17. The computer program product of claim 12, wherein the computer readable program is stored in a computer readable storage medium in a data processing system and wherein the computer readable program was downloaded over a network from a remote data processing system.

18. The computer program product of claim 12, wherein the computer readable program is stored in a computer readable storage medium in a server data processing system and wherein the computer readable program is downloaded over a network to a remote data processing system for use in a computer readable storage medium with the remote system.

19. An apparatus, comprising:

a processor; and

a memory coupled to the processor, wherein the memory comprises instructions which, when executed by the processor, cause the processor to;

receive an integrated circuit design having a memory array;

initialize a tree data structure for the memory array having a root node assigning a default value to all data bits, wherein initializing the tree data structure for the memory array comprises creating the root node having a non-deterministic address having a non-deterministic value for all address bits, wherein the non-deterministic address defines a set of addresses, and a data value equal to a default value; and

responsive to a write operation writing a write data value to a write address, update the tree data structure to track memory array contents.