Query sampling information instruction

• US 8,478,966 B2
• Filed: 12/07/2010
• Issued: 07/02/2013
• Est. Priority Date: 10/02/2008
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bartik, Jane H., Heller, Lisa C., Osisek, Damian L., Schmidt, Donald W., West, Patrick M. Jr., Yeh, Phil C.
• Primary Examiner(s): RHU, KRIS M
• Application Number:
  US12/961,651
• Publication Number:
  US 20120089816A1
• Time in Patent Office: 938 Days
• Field of Search: None
• US Class Current: 712/208
• CPC Class Codes: G06F 12/06 Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication G06F12/08 takes precedence
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 2212/461 Sector or disk block
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields

Abstract

A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.

Claims

1. A computer program product for executing a machine instruction in a central processing unit, the computer program product comprising:

a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;

obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a query sampling information instruction, the query sampling information instruction used to provide information about a central processing unit (CPU) measurement sampling facility used to capture at least one of basic sampling data relating to processing of a central processing unit or diagnostic sampling data; and

a first field identifying a general register, the contents of which are added to the contents of a second field to form a second operand address; and

executing the machine instruction, the executing comprising;

placing information about the central processing unit (CPU) measurement sampling facility in an information block designated by the second operand address of the instruction, the information comprising a sampling interval value and a field indicating sampling is active.

2. The computer program product of claim 1, wherein the information block comprises CPU speed, which is useful for determining a sampling interval for the central processing unit.

3. The computer program product of claim 2, further comprising determining the sampling interval (i) using a defined equation, the defined equation comprising i=(1/f)C, where f=an individual sampling frequency and C=CPU speed.

4. The computer program product of claim 1, wherein the information block comprises at least one of a basic sampling data entry size and a diagnostic sampling data entry size, and wherein one or more of the basic sampling data entry size and the diagnostic sampling data entry size are useful for determining a size of a data buffer (B) to be used for sampling.

5. The computer program product of claim 4, further comprising determining the size of the data buffer using a defined formula, the defined formula comprising:

B=f×

L×

D×

60, where

f=individual sampling frequency;

L=sampling data entry size, in which if only basic sampling is used, L=the basic sampling data entry size, if only diagnostic sampling is used, L=the diagnostic sampling data entry size, and if both basic and diagnostic sampling are used, L=the basic sampling data entry size plus the diagnostic sampling data entry size; and

D=intended duration of a sampling run.

6. The computer program product of claim 1, wherein the information block comprises one or more sampling state controls.

7. The computer program product of claim 6, wherein the one or more sampling state controls comprise one or more state controls for a basic sampling function including at least one of a basic sampling authorization control, a basic sampling enable control, and a basic sampling activation control.

8. The computer program product of claim 6, wherein the one or more sampling state controls comprise one or more state controls for a diagnostic sampling function including at least one of a diagnostic sampling authorization control, a diagnostic sampling enable control, and a diagnostic sampling activation control.

9. The computer program product of claim 1, wherein the information block includes at least one of:

one or more sampling state controls;

a basic sampling data entry size;

a diagnostic sampling data entry size;

a minimum sampling interval;

a maximum sampling interval;

contents of a table entry address register;

contents of a data entry address register; and

central processing unit speed.

10. The computer program product of claim 1, wherein the information block is 64 bytes and includes:

one or more sampling state controls at byte offsets 0-3;

a basic sampling data entry size at byte offsets 4-5;

a diagnostic sampling data entry size at byte offsets 6-7;

a minimum sampling interval at byte offsets 8-15;

a maximum sampling interval at byte offsets 16-23;

contents of a table entry address register at byte offsets 24-31, responsive to at least one of a basic sampling function and a diagnostic sampling function being enabled;

contents of a data entry address register at byte offsets 32-39, responsive to at least one of the basic sampling function and the diagnostic sampling function being enabled; and

central processing unit speed at byte offsets 44-47.

11. The computer program product of claim 10, wherein the one or more sampling state controls comprises one or more state controls for the basic sampling function and one or more state controls for the diagnostic sampling function.

12. A computer system for executing a machine instruction in a central processing unit, the computer system comprising:

a memory; and

a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising;

obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a query sampling information instruction, the query sampling information instruction used to provide information about a central processing unit (CPU) measurement sampling facility used to capture at least one of basic sampling data relating to processing of a central processing unit or diagnostic sampling data; and

a first field identifying a general register, the contents of which are added to the contents of a second field to form a second operand address; and

executing the machine instruction, the executing comprising;

placing information about the central processing unit (CPU) measurement sampling facility in an information block designated by the second operand address of the instruction, the information comprising a sampling interval value and a field indicating sampling is active.

13. The computer system of claim 12, wherein the information block comprises CPU speed, and wherein the method further comprises determining a sampling interval (i) using a defined equation, the defined equation comprising i=(1/f)C, where f=an individual sampling frequency and C=CPU speed.

14. The computer system of claim 12, wherein the information block comprises at least one of a basic sampling data entry size and a diagnostic sampling data entry size, and wherein the method further comprises determining a size of a data buffer (B) to be used for sampling using a defined formula, the defined formula comprising:

B=f×

L×

D×

60, where

f=individual sampling frequency;

L=sampling data entry size, in which if only basic sampling is used, L=the basic sampling data entry size, if only diagnostic sampling is used, L=the diagnostic sampling data entry size, and if both basic and diagnostic sampling are used, L=the basic sampling data entry size plus the diagnostic sampling data entry size; and

D=intended duration of a sampling run.

15. The computer system of claim 12, wherein the information block comprises one or more sampling state controls, and wherein the one or more sampling state controls comprise one or more state controls for a basic sampling function including at least one of a basic sampling authorization control, a basic sampling enable control, and a basic sampling activation control.

16. The computer system of claim 12, wherein the information block comprises one or more sampling state controls, and wherein the one or more sampling state controls comprise one or more state controls for a diagnostic sampling function including at least one of a diagnostic sampling authorization control, a diagnostic sampling enable control, and a diagnostic sampling activation control.

17. The computer system of claim 12, wherein the information block includes at least one of:

one or more sampling state controls;

a basic sampling data entry size;

a diagnostic sampling data entry size;

a minimum sampling interval;

a maximum sampling interval;

contents of a table entry address register;

contents of a data entry address register; and

central processing unit speed.

18. The computer system of claim 12, wherein the information block is 64 bytes and includes:

one or more sampling state controls at byte offsets 0-3;

a basic sampling data entry size at byte offsets 4-5;

a diagnostic sampling data entry size at byte offsets 6-7;

a minimum sampling interval at byte offsets 8-15;

a maximum sampling interval at byte offsets 16-23;

contents of a table entry address register at byte offsets 24-31, responsive to at least one of a basic sampling function and a diagnostic sampling function being enabled;

contents of a data entry address register at byte offsets 32-39, responsive to at least one of the basic sampling function and the diagnostic sampling function being enabled; and

central processing unit speed at byte offsets 44-47.

19. A method executing a machine instruction in a central processing unit, the method comprising:

obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a query sampling information instruction, the query sampling information instruction used to provide information about a central processing unit (CPU) measurement sampling facility used to capture at least one of basic sampling data relating to processing of a central processing unit or diagnostic sampling data; and

a first field identifying a general register, the contents of which are added to the contents of a second field to form a second operand address; and

executing the machine instruction, the executing comprising;

placing information about the central processing unit (CPU) measurement sampling facility in an information block designated by the second operand address of the instruction, the information comprising a sampling interval value and a field indicating sampling is active.

20. The method of claim 19, wherein the information block includes at least one of:

one or more sampling state controls;

a basic sampling data entry size;

a diagnostic sampling data entry size;

a minimum sampling interval;

a maximum sampling interval;

contents of a table entry address register;

contents of a data entry address register; and

central processing unit speed.