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Low fabrication cost, high performance, high reliability chip scale package

  • US 8,481,418 B2
  • Filed: 10/31/2007
  • Issued: 07/09/2013
  • Est. Priority Date: 05/01/2002
  • Status: Expired due to Term
First Claim
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1. A method for fabricating a circuit component, comprising:

  • providing a first device comprising semiconductor substrate, a conductive pad over said semiconductor substrate, and a polymer layer over said semiconductor substrate, wherein a first opening in said polymer layer is over a contact point of said conductive pad;

    forming a first conductive layer on said contact point of said conductive pad and said polymer layer;

    forming a second conductive layer on said first conductive layer;

    forming a first photoresist layer over said semiconductor substrate;

    electroplating a conductive interconnect in a second opening in said first photoresist layer, wherein said conductive interconnect is coupled to said contact point through said second conductive layer;

    forming a nickel-containing layer over said copper conductive interconnect wherein said nickel-containing layer has a width greater than a width of said conductive interconnect;

    forming a solder over said nickel-containing layer, in which said solder has a width equal to the width of said nickel-containing layer; and

    after said forming said second conductive layer, removing said first conductive layer not under said second conductive layer.

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