Image display unit

• US 8,482,003 B2
• Filed: 10/19/2007
• Issued: 07/09/2013
• Est. Priority Date: 10/20/2006
• Status: Active Grant

• Current Assignee: Panasonic Intellectual Property Corporation of America (Panasonic Holdings Corporation)
• Original Assignee: Hitachi Displays Limited (Japan Display Incorporated), Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Inventors: Matsumura, Mieko, Toyota, Yoshiaki, Sato, Takeshi, Hatano, Mutsuko
• Primary Examiner(s): Nguyen, Cuong Q
• Assistant Examiner(s): Gebreyesus, Yosef
• Application Number:
  US11/874,955
• Publication Number:
  US 20080093602A1
• Time in Patent Office: 2,090 Days
• Field of Search: 257/5, 257/59, 257/72, 257/88, 257/258, 257/347, 257/658, 257/909, 257/910, 257/911, 257/E27.112, 257/E27.117, 257/E29.287, 257/E29.29, 257/75, 438/34, 438/73, 438/109
• US Class Current: 257/59
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 71/00 Manufacture or treatment specially adapted for the organic devices covered by this subclass

Abstract

An image display unit is provided for which it is possible to reduce the number of ion plantation and photolithographic processes required to manufacture the device. A gate electrode GT is a laminated structure of a thin bottom layer metal film GMB and a top layer metal film GMT. A top electrode of a storage capacitor Cst is formed of the bottom layer metal film GMB and ion implantation for the top electrode is performed at the same time as the ion implantation of source-drain electrodes. The gate electrode of a PMOSTFT of the device is also formed with the bottom layer metal GMB, and the ion implantation for threshold adjustment is performed by using the same resist.

Claims

1. An image display unit comprising thin-film transistors of top gate type, a storage capacitor and a storage capacitor line, wherein:

the conductivity type of one of said thin-film transistors is an n-channel conductivity type and the conductivity type of another of said thin-film transistors is a p-channel conductivity type;

a polysilicon film, a gate insulator film, a bottom layer metal film and a top layer metal film are laminated from bottom to top;

channels, drains and sources of said thin-film transistors are formed in the polysilicon film;

a gate electrode of said n-channel thin-film transistor comprises a laminated structure including said bottom layer metal film and said top layer metal film,

a gate electrode of said p-channel thin-film transistor comprises a single layer structure comprised of said bottom layer metal film;

a top electrode of said storage capacitor is comprised of said bottom layer metal film;

a bottom electrode of said storage capacitor is comprised of said polysilicon film;

said storage capacitor line is comprised of said top layer metal film and is connected with the bottom layer metal film,

phosphorous ion density of said bottom layer metal film of said bottom electrode is higher than phosphorous ion density of said bottom layer metal film of said storage capacitor line, and

said top layer metal film does not extend over the storage capacitor.

2. An image display unit according to claim 1, wherein said bottom layer metal film comprises a transparent electrode.

3. An image display unit according to claim 1, wherein a film thickness of said bottom layer metal film is thinner than a film thickness of said top layer metal film.

4. An image display unit according to claim 3, wherein the film thickness of said bottom layer metal film is in the range from 20 nm to 60 nm.

5. An image display unit according to claim 1, wherein a width of the bottom layer metal film of said gate electrode of said n-channel thin film transistor is equal to a width of the top layer metal film of said gate electrode.

6. An image display unit according to claim 1, wherein a width of the bottom layer metal film of said gate electrode of said n-channel thin film transistor is wider than a width of the top layer metal film of said gate electrode.

7. An image display unit according to claim 1,

wherein ion densities of said bottom electrode, said drains and sources are the same.

8. An image display unit according to claim 1,

wherein ions are implanted to said bottom electrode, said drains and sources in a common ion implantation process.