Lighting system with power factor correction control data determined from a phase modulated signal

• US 8,482,220 B2
• Filed: 03/27/2012
• Issued: 07/09/2013
• Est. Priority Date: 03/12/2007
• Status: Active Grant

• Current Assignee: Signify Holding B.V. (Signify N.V.)
• Original Assignee: Cirrus Logic Incorporated
• Inventors: Melanson, John L.
• Primary Examiner(s): Le, Tung X
• Application Number:
  US13/431,569
• Publication Number:
  US 20120181946A1
• Time in Patent Office: 469 Days
• Field of Search: 315/209.R, 315224-226, 315/247, 315/291, 315/293, 315/294, 315/297, 315/307, 315/308, 315/316, 323/222, 323/283, 323/285, 363/15, 363/19, 363 2101- 2113, 363/23
• US Class Current: 315/291
• CPC Class Codes: H03K 17/18 Modifications for indicating state of switch
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 17/6872 using complementary field-effect transistors
• CPC Class Codes: H03K 17/74 by the use, as active elements, of diodes by the use of more than one type of semiconductor device H03K17/567; by the use of tunnel diodes H03K17/58; by the use of negative resistance diodes H03K17/70
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/14 using electrical feedback from LEDs or from LED modules
• CPC Class Codes: H05B 45/3725 Switched mode power supply [SMPS]
• CPC Class Codes: H05B 47/20 Responsive to malfunctions or to light source life; for protection
• CPC Class Codes: Y02B 20/30 Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]
• CPC Class Codes: Y10S 315/04 Dimming circuit for fluorescent lamps
• CPC Class Codes: Y10S 323/905 Lamp dimmer structure

Abstract

A light emitting diode (LED) lighting system includes a power factor correction (PFC) controller that determines at least one power factor correction control parameter from phase delays of a phase modulated signal. In at least one embodiment, a peak voltage of the phase modulated signal is a PFC control parameter used by the PFC controller to control power factor correction and generation of a link voltage by a PFC LED driver circuit. The phase delays are related to a peak voltage of the phase modulated signal. Thus, in at least one embodiment, detecting the phase delay in one or more cycles of the phase modulated signal allows the PFC controller to determine the peak voltage of the phase modulated signal.

Claims

1. A light emitting diode (LED) lighting system comprising:

a controller comprising;

an input to receive a phase delay signal indicating a phase delay of a phase modulated dimmer signal; and

a digital signal processor, coupled to the input, to receive the phase delay signal and determine a control operating parameter from the phase delay signal and to generate a switch control signal using the determined operating parameter to vary an input current to a switching power converter with a phase modulated voltage.

2. The LED lighting system of claim 1 further comprising a time-based phase delay detector to detect the phase delay of the phase modulated signal and generate the phase delay signal as a digital signal.

3. The LED lighting system of claim 1 wherein the digital signal processor is further configured to execute a control signal state algorithm to determine a pulse width of the switch control signal.

4. The LED lighting system of claim 1 wherein the operating parameter is a peak voltage of the phase modulated dimmer signal.

5. The LED lighting system of claim 1 wherein the phase delay signal indicates a dimming level and the controller is further configured to generate a switch control signal to cause the switching power converter to respond to the dimming level indicated by the signal without decreasing an effective resistance of the switching power converter, as perceived by a voltage source of the switching power converter, as the dimming level indicated by the signal increases.

6. The LED lighting system of claim 1 wherein the controller is further configured to generate a duty cycle modulated control signal to control a regulated link voltage of the switching power converter and to decrease the link voltage when a duty cycle of the control signal decreases to a value between zero and a duty cycle threshold value.

7. The LED lighting system of claim 1 wherein the controller is further configured to generate approximately constant pulse widths for the switch control signal during each cycle of phase modulated signal when a duty cycle of switch control signal is below a predetermined threshold.

8. The LED lighting system of claim 1 wherein the controller is further configured to generate pulses for the switch control signal during the phase delays of the phase modulated signal, wherein the pulse widths and duty cycles of the pulses of the switch control signal generated during the phase delays are sufficient to attenuate ripple of the phase modulated signal during the phase delays of phase modulated signal.

9. The LED lighting system of claim 8 wherein the pulses of switch control signal generated during the phase delays have a period significantly greater than a period of the pulses of the switch control signal during an active period of phase modulated signal.

10. A method of controlling a light emitting diode (LED) lighting system, the method comprising:

receiving a phase delay signal indicating a phase delay of a phase modulated dimmer signal;

determining a control operating parameter from the phase delay signal using a digital signal processor; and

generating a switch control signal using the determined operating parameter to vary an input current to a switching power converter with a phase modulated voltage.

11. The method of claim 10 further comprising:

detecting the phase delay of the phase modulated signal using a time-based phase delay detector; and

generating the phase delay signal as a digital signal.

12. The method of claim 10 further comprising:

executing a control signal state algorithm to determine a pulse width of the switch control signal.

13. The method of claim 10 wherein the operating parameter is a peak voltage of the phase modulated dimmer signal.

14. The method of claim 10 wherein the phase delay signal indicates a dimming level, the method further comprising:

generating the switch control signal to cause the switching power converter to respond to the dimming level indicated by the signal without decreasing an effective resistance of the switching power converter, as perceived by a voltage source of the switching power converter, as the dimming level indicated by the signal increases.

15. The method of claim 10 further comprising:

generating a duty cycle modulated control signal to control a regulated link voltage of the switching power converter; and

decreasing the link voltage when a duty cycle of the control signal decreases to a value between zero and a duty cycle threshold value.

16. The method of claim 10 further comprising:

generating approximately constant pulse widths for the switch control signal during each cycle of phase modulated signal when a duty cycle of switch control signal is below a predetermined threshold.

17. The method of claim 10 further comprising:

generating pulses for the switch control signal during the phase delays of the phase modulated signal, wherein the pulse widths and duty cycles of the pulses of the switch control signal generated during the phase delays are sufficient to attenuate ripple of the phase modulated signal during the phase delays of phase modulated signal.

18. The method of claim 17 wherein the pulses of switch control signal generated during the phase delays have a period significantly greater than a period of the pulses of the switch control signal during an active period of phase modulated signal.

19. A light emitting diode (LED) lighting system comprising:

a controller to receive a signal indicating a dimming level and to generate a switch control signal to cause a switching power converter to respond to the dimming level indicated by the signal without decreasing an effective resistance of the switching power converter, as perceived by a voltage source of the switching power converter, as the dimming level indicated by the signal increases.

20. The lighting system of claim 19 wherein the controller is further configured to decrease a duty cycle of the switch control signal as the dimming level decreases until the dimming level reaches a dimming level threshold and to keep the duty cycle of the switch control signal approximately constant for dimming levels below the dimming level threshold.

21. The lighting system of claim 19 wherein the controller is further configured to increase the effective resistance of the switching power converter as the dimming level indicated by the dimming signal decreases.

22. A method of controlling a light emitting diode (LED) lighting system, the method comprising:

receiving a signal indicating a dimming level; and

generating a control signal to cause a switching power converter to respond to the dimming level indicated by the signal without decreasing an effective resistance of the switching power converter, as perceived by a voltage source of the switching power converter, as the dimming level indicated by the signal increases.

23. The method of claim 22 further comprising:

decreasing a duty cycle of the switch control signal as the dimming level decreases until the dimming level decreases to a dimming level threshold; and

keeping the duty cycle of the switch control signal approximately constant for dimming levels below the dimming level threshold.

24. The method of claim 22 further comprising:

increasing the effective resistance of the switching power converter as the dimming level indicated by the dimming signal decreases.

25. A light emitting diode (LED) lighting system comprising:

a controller to generate a duty cycle modulated control signal to control a regulated link voltage of a switching power converter and to decrease the link voltage when a duty cycle of the control signal decreases to a value between zero and a duty cycle threshold value.

26. The LED lighting system of claim 25 wherein the switching power converter is configured to operate from a mains voltage, and the controller is configured to decrease the link voltage to approximately equal to the mains voltage.

27. The LED lighting system of claim 25 wherein the duty cycle threshold value is a member of the group consisting of 0.5 and between 0.25 and 0.5.

28. A method of controlling a light emitting diode (LED) lighting system, the method comprising:

generating a duty cycle modulated control signal to control a link voltage of a switching power converter; and

decreasing the voltage when a duty cycle of the control signal decreases to a value between zero and a duty cycle threshold value.

29. The method of claim 28 wherein the switching power converter is configured to operate from a mains voltage, the method further comprising:

decreasing the voltage to approximately equal to the mains voltage.

30. The method of claim 28 wherein the duty cycle threshold value is a member of the group consisting of 0.5 and between 0.25 and 0.5.

31. A light emitting diode (LED) lighting system comprising:

a controller comprising;

an input to receive a phase delay signal indicating a phase delay of a phase modulated dimmer signal; and

wherein the controller is configured to receive the phase delay signal and to generate pulses for the switch control signal during the phase delays of the phase modulated signal, wherein the pulse widths and duty cycles of the pulses of the switch control signal generated during the phase delays are sufficient to attenuate ripple of the phase modulated signal during the phase delays of phase modulated signal.

32. A method of controlling a light emitting diode (LED) lighting system, the method comprising:

receiving a phase delay signal indicating a phase delay of a phase modulated voltage to a switching power converter; and

generating pulses for a switch control signal during the phase delays of the phase modulated voltage, wherein the pulse widths and duty cycles of the pulses of the switch control signal generated during the phase delays are sufficient to attenuate ripple of the phase modulated voltage during the phase delays of the phase modulated voltage.