Angular range reduction in an integrated circuit device

• US 8,484,265 B1
• Filed: 03/04/2010
• Issued: 07/09/2013
• Est. Priority Date: 03/04/2010
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Langhammer, Martin
• Primary Examiner(s): SUN, SCOTT C
• Application Number:
  US12/717,212
• Time in Patent Office: 1,223 Days
• Field of Search: None
• US Class Current: 708/201
• CPC Class Codes: G06F 7/548 Trigonometric functions; Co-ordinate transformations

Abstract

Circuitry for deriving a range-reduced value of an angle represented by a number having a mantissa and an exponent includes memory that stores a table that identifies, for each one of a plurality of values of the exponent, a base fractional rotation associated with said one of said plurality of values of said exponent, and an incremental fractional rotation associated with each increment of said mantissa. The circuitry further includes a multiplier that multiplies the mantissa by the incremental fractional rotation to provide a product representing a mantissa contribution. An adder adds the base fractional rotation to any fractional portion of the mantissa contribution. The fractional portion of the result of that addition represents the range-reduced angle. That representation can be multiplied by a constant representing one complete rotation in a desired angular measurement system, to convert that representation to a value representing the range-reduced angle in that measurement system.

Claims

1. Circuitry for deriving a range-reduced value of an angle represented by a number having a mantissa and an exponent, said circuitry comprising:

memory that stores a table that identifies, for each one of a plurality of values of said exponent, a base fractional rotation associated with said one of said plurality of values of said exponent, and an incremental fractional rotation associated with each increment of said mantissa;

a multiplier that multiplies said mantissa by said incremental fractional rotation to provide a product representing a mantissa contribution; and

an adder that adds said base fractional rotation to any fractional portion of said mantissa contribution.

2. The circuitry of claim 1 further comprising normalization circuitry for said mantissa contribution.

3. The circuitry of claim 2 wherein said normalization circuitry comprises:

a count-leading zeroes module to determine a number of leading zeroes right of a binal point of said mantissa;

a left-shifter module to left-shift said mantissa by said number of leading zeroes;

circuitry that further shifts said product when it contains a leading zero;

an adder/subtractor chain for tracking shifting of said mantissa and said product; and

a barrel shifter that denormalizes said product based on output of said adder/subtractor chain.

4. The circuitry of claim 1 further comprising circuitry for discarding any non-fractional portion of output of said adder to provide a fractional rotation representing said range-reduced angle.

5. The circuitry of claim 4 further comprising a final multiplier that multiplies said fractional rotation representing said range-reduced angle by a constant representing one complete rotation in a desired angular measurement system, to convert said fractional rotation representing said range-reduced angle to a value representing said range-reduced angle in said desired angular measurement system.

6. A method of deriving, in circuitry, a range-reduced value of an angle represented by a number that has a mantissa and an exponent and that is input into the circuitry, said method comprising:

storing, in memory in the circuitry, a table that identifies, for each one of a plurality of values of said exponent, a base fractional rotation associated with said one of said plurality of values of said exponent, and an incremental fractional rotation associated with each increment of said mantissa;

multiplying said mantissa, using multiplication circuits in the circuitry, by said incremental fractional rotation to provide a product representing a mantissa contribution; and

adding said base fractional rotation, using addition circuits in the circuitry, to any fractional portion of said mantissa contribution.

7. The method of claim 6 further comprising normalizing, using normalization circuits in the circuitry, said mantissa contribution.

8. The method of claim 7 wherein said normalizing comprises:

determining, using counting circuits in the circuitry, a number of leading zeroes right of a binal point of said mantissa;

left-shifting said mantissa, using first shifting circuits in the circuitry, by said number of leading zeroes;

further shifting said product, using second shifting circuits in the circuitry, when said product contains a leading zero;

tracking, using circuits in the circuitry, shifting of said mantissa and said product; and

denormalizing said product, using other circuits in the circuitry, based on output of said tracking.

9. The method of claim 6 further comprising discarding any non-fractional portion of output of said adding to provide a fractional rotation representing said range-reduced angle.

10. The method of claim 9 further comprising a multiplying, using multiplication circuits in the circuitry, said fractional rotation representing said range-reduced angle by a constant representing one complete rotation in a desired angular measurement system, to convert said fractional rotation representing said range-reduced angle to a value representing said range-reduced angle in said desired angular measurement system.

11. A method of configuring a programmable integrated circuit device as circuitry for deriving a range-reduced value of an angle represented by a number having a mantissa and an exponent, said method comprising:

configuring memory of said programmable integrated circuit device to store a table that identifies, for each one of a plurality of values of said exponent, a base fractional rotation associated with said one of said plurality of values of said exponent, and an incremental fractional rotation associated with each increment of said mantissa;

configuring logic of said programmable integrated circuit device to multiply said mantissa by said incremental fractional rotation to provide a product representing a mantissa contribution; and

configuring logic of said programmable integrated circuit device to add said base fractional rotation to any fractional portion of said mantissa contribution.

12. The method of claim 11 further comprising configuring logic of said programmable integrated circuit device as normalization circuitry for said mantissa contribution.

13. The method of claim 12 wherein said configuring logic of said programmable integrated circuit device as normalization circuitry comprises:

configuring logic of said programmable integrated circuit device as a count-leading zeroes module to determine a number of leading zeroes right of a binal point of said mantissa;

configuring logic of said programmable integrated circuit device as a left-shifter module to left-shift said mantissa by said number of leading zeroes;

configuring logic of said programmable integrated circuit device to further shift said product when it contains a leading zero;

configuring logic of said programmable integrated circuit device as an adder/subtractor chain for tracking shifting of said mantissa and said product; and

configuring logic of said programmable integrated circuit device as a barrel shifter that denormalizes said product based on output of said adder/subtractor chain.

14. The method of claim 11 further comprising configuring logic of said programmable integrated circuit device as circuitry for discarding any non-fractional portion of output of said adder to provide a fractional rotation representing said range-reduced angle.

15. The method of claim 14 further comprising configuring logic of said programmable integrated circuit device to multiply said fractional rotation representing said range-reduced angle by a constant representing one complete rotation in a desired angular measurement system, to convert said fractional rotation representing said range-reduced angle to a value representing said range-reduced angle in said desired angular measurement system.

16. A programmable integrated circuit device comprising:

memory configured to store a table that identifies, for each one of a plurality of values of said exponent, a base fractional rotation associated with said one of said plurality of values of said exponent, and an incremental fractional rotation associated with each increment of said mantissa;

logic configured to multiply said mantissa by said incremental fractional rotation to provide a product representing a mantissa contribution; and

logic configured to add said base fractional rotation to any fractional portion of said mantissa contribution.

17. The programmable integrated circuit device of claim 16 further comprising logic configured as normalization circuitry for said mantissa contribution.

18. The programmable integrated circuit device of claim 17 wherein said logic configured as normalization circuitry comprises:

logic configured as a count-leading zeroes module to determine a number of leading zeroes right of a binal point of said mantissa;

logic configured as a left-shifter module to left-shift said mantissa by said number of leading zeroes;

logic configured to further shift said product when it contains a leading zero;

logic configured as an adder/subtractor chain for tracking shifting of said mantissa and said product; and

logic configured as a barrel shifter that denormalizes said product based on output of said adder/subtractor chain.

19. The programmable integrated circuit device of claim 16 further comprising logic configured as circuitry for discarding any non-fractional portion of output of said adder to provide a fractional rotation representing said range-reduced angle.

20. The programmable integrated circuit device of claim 19 further comprising logic configured to multiply said fractional rotation representing said range-reduced angle by a constant representing one complete rotation in a desired angular measurement system, to convert said fractional rotation representing said range-reduced angle to a value representing said range-reduced angle in said desired angular measurement system.

21. A non-transitory machine-readable data storage medium encoded with machine-executable instructions for configuring a programmable integrated circuit device as circuitry for deriving a range-reduced value of an angle represented by a number having a mantissa and an exponent, said instructions comprising:

instructions to configure memory of said programmable integrated circuit device to store a table that identifies, for each one of a plurality of values of said exponent, a base fractional rotation associated with said one of said plurality of values of said exponent, and an incremental fractional rotation associated with each increment of said mantissa;

instructions to configure logic of said programmable integrated circuit device to multiply said mantissa by said incremental fractional rotation to provide a product representing a mantissa contribution; and

instructions to configure logic of said programmable integrated circuit device to add said base fractional rotation to any fractional portion of said mantissa contribution.

22. The non-transitory machine-readable data storage medium of claim 21 wherein said instructions further comprise instructions to configure logic of said programmable integrated circuit device as normalization circuitry for said mantissa contribution.

23. The non-transitory machine-readable data storage medium of claim 22 wherein said instructions to configure logic of said programmable integrated circuit device as normalization circuitry comprise:

instructions to configure logic of said programmable integrated circuit device as a count-leading zeroes module to determine a number of leading zeroes right of a binal point of said mantissa;

instructions to configure logic of said programmable integrated circuit device as a left-shifter module to left-shift said mantissa by said number of leading zeroes;

instructions to configure logic of said programmable integrated circuit device to further shift said product when it contains a leading zero;

instructions to configure logic of said programmable integrated circuit device as an adder/subtractor chain for tracking shifting of said mantissa and said product; and

instructions to configure logic of said programmable integrated circuit device as a barrel shifter that denormalizes said product based on output of said adder/subtractor chain.

24. The non-transitory machine-readable data storage medium of claim 21 wherein said instructions further comprise instructions to configure logic of said programmable integrated circuit device as circuitry for discarding any non-fractional portion of output of said adder to provide a fractional rotation representing said range-reduced angle.

25. The non-transitory machine-readable data storage medium of claim 24 wherein said instructions further comprise instructions to configure logic of said programmable integrated circuit device to multiply said fractional rotation representing said range-reduced angle by a constant representing one complete rotation in a desired angular measurement system, to convert said fractional rotation representing said range-reduced angle to a value representing said range-reduced angle in said desired measurement system.