Semiconductor device

• US 8,487,745 B2
• Filed: 11/30/2007
• Issued: 07/16/2013
• Est. Priority Date: 12/07/2006
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kozuma, Munehiro, Kurokawa, Yoshiyuki
• Primary Examiner(s): MULLEN, THOMAS J
• Application Number:
  US11/948,602
• Publication Number:
  US 20080136604A1
• Time in Patent Office: 2,055 Days
• Field of Search: 340/572.1, 340/572.4, 340/572.7, 340/10.1, 340/10.4, 340/10.51, 235/375, 235/385, 235/492, 257368-413, 365/149, 365/189.011, 365/192, 365/203, 365/208, 365/189.01
• US Class Current: 340/10.1
• CPC Class Codes: H01M 10/425 Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing printed circuits H05K1/00
• CPC Class Codes: H01M 10/44 Methods for charging or discharging circuits for charging H02J7/00
• CPC Class Codes: H01M 10/46 Accumulators structurally combined with charging apparatus circuits for charging H02J7/00
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

Communication performance of the wireless tag is improved by providing an SRAM provided with an RF battery in the wireless tag provided with a CPU to speed up the CPU system. Moreover, rewriting of data in a memory of a wireless tag provided with a CPU is enabled. An RF battery includes an antenna circuit, a power supply portion, and a power storage device. A function as a non-volatile memory is provided to an SRAM by combining the SRAM and an RF battery.

Claims

1. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM;

a wireless power storage unit including an antenna circuit, the wireless power storage unit being configured to store electricity generated from a signal received by the antenna circuit; and

a power supply circuit being configured to supply a power supply voltage generated from the signal received by the antenna circuit to the central processing unit,

wherein the SRAM is configured to store the data by using the electricity stored in the wireless power storage unit.

2. The semiconductor device according to claim 1, wherein the antenna circuit comprises an antenna and a resonance circuit.

3. The semiconductor device of claim 1, wherein the SRAM is configured to use the electricity stored in the wireless power storage unit to store the data regardless of whether the power supply circuit supplies the power supply voltage.

4. The semiconductor device of claim 3, wherein the SRAM is configured to store program data for the central processing unit.

5. The semiconductor device of claim 4, wherein the SRAM is configured to operate as a ROM.

6. The semiconductor device of claim 3, wherein the antenna circuit is configured to wirelessly receive the electricity for storing in the wireless power storage unit.

7. The semiconductor device of claim 3, wherein the wireless power storage unit is configured to convert the electricity from an AC signal into a DC signal.

8. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM;

a wireless power storage unit including a power supply portion, an antenna circuit, and a power storage device, the wireless power storage unit being configured to store electricity generated from a signal received by the antenna circuit; and

a power supply circuit being configured to supply a power supply voltage generated from the signal received by the antenna circuit to the central processing unit,

wherein the power supply portion is configured to convert an AC signal received by the antenna circuit to a DC signal and to control charging and discharging of the power storage device by using the DC signal, and

wherein the SRAM is configured to store the data by using the electricity stored in the wireless power storage unit.

9. The semiconductor device according to claim 8, wherein the power storage device comprises a battery or a capacitor.

10. The semiconductor device according to claim 8, wherein the antenna circuit comprises an antenna and a resonance circuit.

11. A semiconductor device comprising:

an SRAM;

a central processing unit being configured to read data from the SRAM;

a wireless power storage unit including a power supply portion, an antenna circuit, and a power storage device, the wireless power storage unit being configured to store electricity generated from a signal received by the antenna circuit; and

a power supply circuit being configured to supply a power supply voltage generated from the signal received by the antenna circuit to the central processing unit,

wherein the SRAM, the central processing unit, the power supply portion, the antenna circuit, and the power storage device are formed on a substrate, and

wherein the SRAM is configured to store the data by using the electricity stored in the wireless power storage unit.

12. The semiconductor device according to claim 11, wherein the power storage device comprises a battery or a capacitor.

13. The semiconductor device according to claim 11, wherein the substrate is one of a glass substrate, a quartz substrate, a plastic substrate, and a semiconductor substrate.

14. The semiconductor device according to claim 11, wherein the antenna circuit comprises an antenna and a resonance circuit.

15. A semiconductor device comprising:

an analog portion including an antenna circuit, a wireless power storage unit and a power supply circuit; and

a logic portion including a central processing unit and a memory,

wherein the central processing unit is configured to read data from the memory,

wherein the wireless power storage unit is configured to store electricity generated from a signal received by the antenna circuit ,

wherein the power supply circuit is configured to supply a power supply voltage generated from the signal received by the antenna circuit to the central processing unit, and

wherein the memory is configured to store the data by using the electricity stored in the wireless power storage unit.

16. The semiconductor device according to claim 15, wherein the memory is a static random access memory.

17. The semiconductor device according to claim 15, wherein the analog portion further comprises a reset circuit, a clock generation circuit, a demodulation circuit, a modulation circuit, and a power supply management circuit.

18. The semiconductor device according to claim 15, wherein the logic portion further comprises a mask ROM and a controller.

19. The semiconductor device according to claim 15, wherein the antenna circuit comprises an antenna and a resonance circuit.

20. A semiconductor device comprising:

an SRAM;

a logic circuit being configured to read data from the SRAM;

a wireless power storage unit being configured to store electricity generated from a signal received wirelessly; and

a power supply circuit being configured to supply a power supply voltage generated from the signal to the logic circuit,

wherein the SRAM is configured to store the data by using the electricity stored in the wireless power storage unit.

21. The semiconductor device according to claim 20, wherein the wireless power storage unit comprises an antenna circuit.

22. The semiconductor device according to claim 20, wherein the antenna circuit is a coiled antenna.

23. The semiconductor device according to claim 21, wherein the SRAM, the logic circuit, the wireless power storage unit, the power supply circuit, and the antenna circuit are formed on a substrate.

24. The semiconductor device according to claim 20, wherein the signal is received using an electric field or a magnetic field.

25. A semiconductor device comprising:

an SRAM;

a logic circuit being configured to read data from the SRAM;

a wireless power storage unit including a power supply portion and a power storage device, the wireless power storage unit being configured to store electricity generated from a signal received wirelessly; and

a power supply circuit being configured to supply a power supply voltage generated from the signal to the logic circuit,

wherein the power supply portion is configured to convert the signal to a DC signal and to control charging and discharging of the power storage device by using the DC signal, and

wherein the SRAM is configured to store the data by using the electricity stored in the wireless power storage unit.

26. The semiconductor device according to claim 25, wherein the power storage device comprises a battery or a capacitor.

27. The semiconductor device according to claim 25, wherein the wireless power storage unit comprises an antenna circuit.

28. The semiconductor device according to claim 27, wherein the antenna circuit is a coiled antenna.

29. The semiconductor device according to claim 25, wherein the signal is received using an electric field or a magnetic field.

30. A semiconductor device comprising:

an analog portion including a wireless power storage unit and a power supply circuit; and

a logic portion including a logic circuit and a memory,

wherein the logic circuit is configured to read data from the memory,

wherein the wireless power storage unit is configured to store electricity generated from a signal received wirelessly,

wherein the power supply circuit is configured to supply a power supply voltage generated from the signal to the logic circuit, and

wherein the memory is configured to store the data by using the electricity stored in the wireless power storage unit.

31. The semiconductor device according to claim 30, wherein the wireless power storage unit comprises an antenna circuit.

32. The semiconductor device according to claim 31, wherein the antenna circuit is a coiled antenna.

33. The semiconductor device according to claim 30, wherein the signal is received using an electric field or a magnetic field.

34. The semiconductor device according to claim 30, wherein the memory is a static random access memory.

35. The semiconductor device according to claim 30, wherein the analog portion further comprises a reset circuit, a clock generation circuit, a demodulation circuit, a modulation circuit, and a power supply management circuit.

36. The semiconductor device according to claim 30, wherein the logic portion further comprises a mask ROM and a controller.