Display device and method for manufacturing the same

• US 8,488,077 B2
• Filed: 02/01/2012
• Issued: 07/16/2013
• Est. Priority Date: 08/27/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Sakata, Junichiro, Tsubuku, Masashi, Akimoto, Kengo, Hosoba, Miyuki, Sakakura, Masayuki, Oikawa, Yoshiaki
• Primary Examiner(s): Doan, Jennifer
• Application Number:
  US13/363,405
• Publication Number:
  US 20120126232A1
• Time in Patent Office: 531 Days
• Field of Search: 349/20, 349/21, 349/33, 349/42, 349/43, 349/46, 349/47, 349/52
• US Class Current: 349/43
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02664 Aftertreatments planarisation in general H01L21/304
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 27/1251 comprising TFTs having a different architecture, e.g. top- and bottom gate TFTs
• CPC Class Codes: H01L 27/1259 Multistep manufacturing methods
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

Claims

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer over an insulating layer;

performing dehydration or dehydrogenation on the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming an oxide insulating layer which is in contact with a part of the oxide semiconductor layer and is over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and

forming an i-type region in the oxide semiconductor layer by heating the oxide insulating layer,

wherein the i-type region is formed at least between a first n-type region and a second n-type region,

wherein the first n-type region is in contact with the source electrode layer, and

wherein the second n-type region is in contact with the drain electrode layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the dehydration or dehydrogenation is performed in a nitrogen atmosphere or a rare gas atmosphere.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the oxide semiconductor layer is cooled in an oxygen atmosphere or an N₂O gas atmosphere after the step of the dehydration or dehydrogenation.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the step of the heating is performed in a nitrogen atmosphere or a rare gas atmosphere.

5. The method for manufacturing a semiconductor device according to claim 1, wherein thickness of the oxide semiconductor layer is from 15 nm to 50 nm inclusive.

6. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor device includes a field effect transistor, a liquid crystal display device, a television device, a mobile phone, a camera, a portable information terminal, or a personal computer.

7. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer over an insulating layer;

performing dehydration or dehydrogenation on the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming an oxide insulating layer which is in contact with a part of the oxide semiconductor layer and is over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and

forming an i-type region in the oxide semiconductor layer by heating the oxide insulating layer,

wherein the i-type region is formed at least between a first n-type region and a second n-type region,

wherein the first n-type region is in contact with the source electrode layer,

wherein the second n-type region is in contact with the drain electrode layer, and

wherein oxygen is supplied from the oxide insulating layer to the oxide semiconductor layer when the oxide insulating layer is heated.

8. The method for manufacturing a semiconductor device according to claim 7, wherein the dehydration or dehydrogenation is performed in a nitrogen atmosphere or a rare gas atmosphere.

9. The method for manufacturing a semiconductor device according to claim 7, wherein the oxide semiconductor layer is cooled in an oxygen atmosphere or an N₂O gas atmosphere after the step of the dehydration or dehydrogenation.

10. The method for manufacturing a semiconductor device according to claim 7, wherein the step of the heating is performed in a nitrogen atmosphere or a rare gas atmosphere.

11. The method for manufacturing a semiconductor device according to claim 7, wherein thickness of the oxide semiconductor layer is from 15 nm to 50 nm inclusive.

12. The method for manufacturing a semiconductor device according to claim 7, wherein the semiconductor device includes a field effect transistor, a liquid crystal display device, a television device, a mobile phone, a camera, a portable information terminal, or a personal computer.

13. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer over an insulating layer;

performing dehydration or dehydrogenation on the oxide semiconductor layer;

forming a source electrode layer and a drain electrode layer over the oxide semiconductor layer;

forming an oxide insulating layer which is in contact with a part of the oxide semiconductor layer and is over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and

forming an i-type region in the oxide semiconductor layer by heating the oxide insulating layer,

wherein the i-type region is formed at least between a first n-type region and a second n-type region,

wherein the first n-type region is in contact with the source electrode layer,

wherein the second n-type region is in contact with the drain electrode layer, and

wherein the i-type region is formed by diffusion of oxygen from the oxide insulating layer to the oxide semiconductor layer.

14. The method for manufacturing a semiconductor device according to claim 13, wherein the dehydration or dehydrogenation is performed in a nitrogen atmosphere or a rare gas atmosphere.

15. The method for manufacturing a semiconductor device according to claim 13, wherein the oxide semiconductor layer is cooled in an oxygen atmosphere or an N₂O gas atmosphere after the step of the dehydration or dehydrogenation.

16. The method for manufacturing a semiconductor device according to claim 13, wherein the step of the heating is performed in a nitrogen atmosphere or a rare gas atmosphere.

17. The method for manufacturing a semiconductor device according to claim 13, wherein thickness of the oxide semiconductor layer is from 15 nm to 50 nm inclusive.

18. The method for manufacturing a semiconductor device according to claim 13, wherein the semiconductor device includes a field effect transistor, a liquid crystal display device, a television device, a mobile phone, a camera, a portable information terminal, or a personal computer.

19. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer over an insulating surface;

performing a first heat treatment on the oxide semiconductor layer;

forming a first metal layer and a second metal layer over the oxide semiconductor layer;

forming an oxide insulating layer over the first metal layer, the second metal layer and the oxide semiconductor layer, the oxide insulating layer being in contact with the oxide semiconductor layer at least between the first metal layer and the second metal layer; and

performing a second heat treatment after the step of forming the oxide insulating layer;

wherein the oxide semiconductor layer includes a first region in contact with the first metal layer,

wherein the oxide semiconductor layer includes a second region in contact with the second metal layer,

wherein the first region has an n-type conductivity, and

wherein the second region has an n-type conductivity.

20. The method for manufacturing a semiconductor device according to claim 19, wherein the first heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

21. The method for manufacturing a semiconductor device according to claim 19, wherein the oxide semiconductor layer is cooled in an oxygen atmosphere or an N₂O gas atmosphere after the first heat treatment.

22. The method for manufacturing a semiconductor device according to claim 19, wherein the second heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

23. The method for manufacturing a semiconductor device according to claim 19, wherein thickness of the oxide semiconductor layer is from 15 nm to 50 nm inclusive.

24. The method for manufacturing a semiconductor device according to claim 19, wherein the semiconductor device includes a field effect transistor, a liquid crystal display device, a television device, a mobile phone, a camera, a portable information terminal, or a personal computer.

25. A method for manufacturing a semiconductor device, comprising the steps of:

forming an oxide semiconductor layer over an insulating surface;

performing a first heat treatment on the oxide semiconductor layer;

forming a first metal layer and a second metal layer over the oxide semiconductor layer;

forming an oxide insulating layer over the first metal layer, the second metal layer and the oxide semiconductor layer; and

performing a second heat treatment after the step of forming the oxide insulating layer;

wherein the oxide semiconductor layer includes a first region under the first metal layer,

wherein the oxide semiconductor layer includes a second region under the second metal layer,

wherein the oxide semiconductor layer includes a third region in contact with the oxide insulating layer and provided between the first region and the second region, and

wherein resistance of the third region is increased to be higher than resistance of at least one of the first and second regions by the second heat treatment.

26. The method for manufacturing a semiconductor device according to claim 25, wherein the first heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

27. The method for manufacturing a semiconductor device according to claim 25, wherein the oxide semiconductor layer is cooled in an oxygen atmosphere or an N₂O gas atmosphere after the first heat treatment.

28. The method for manufacturing a semiconductor device according to claim 25, wherein the second heat treatment is performed in a nitrogen atmosphere or a rare gas atmosphere.

29. The method for manufacturing a semiconductor device according to claim 25, wherein thickness of the oxide semiconductor layer is from 15 nm to 50 nm inclusive.

30. The method for manufacturing a semiconductor device according to claim 25, wherein the semiconductor device includes a field effect transistor, a liquid crystal display device, a television device, a mobile phone, a camera, a portable information terminal, or a personal computer.