Compensation of local oscillator phase jitter

• US 8,489,053 B2
• Filed: 01/16/2011
• Issued: 07/16/2013
• Est. Priority Date: 01/16/2011
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: SiPort, Inc. (Intel Corporation)
• Inventors: Peavey, David, Arad, Oren
• Primary Examiner(s): Nguyen, Lee
• Application Number:
  US13/007,654
• Publication Number:
  US 20120184235A1
• Time in Patent Office: 912 Days
• Field of Search: 455/196.1, 455255-260, 455/265, 331/1.R
• US Class Current: 455/255
• CPC Class Codes: H03L 7/07 using several loops, e.g. for redundant clock signal generation
• CPC Class Codes: H03L 7/0805 the loop being adapted to provide an additional control signal for use outside the loop

Abstract

Digital logic circuitry is disclosed. The circuitry includes local oscillator drift and phase compensation logic that compensates the frequency drift and the phase noise of a local oscillator generated by a digitally controlled oscillator.

Claims

1. A method for generating a local oscillator output, the method comprising:

receiving an intermediate frequency input, a reference clock input, and a local oscillator feedback input, the intermediate frequency input received from an analog-to-digital converter, and the local oscillator feedback input received from a tuner;

filtering the reference clock input to produce a filtered version of the reference clock input;

generating a phase error correction signal based at least in part on the filtered version of the reference clock input and a phase of the local oscillator feedback input;

generating the local oscillator output based at least in part on the intermediate frequency input and the phase error correction signal; and

providing the local oscillator output.

2. The method of claim 1, wherein the local oscillator feedback input is based at least in part on at least one of the local oscillator output and a frequency divided version of the local oscillator feedback input.

3. The method of claim 1, wherein the reference clock input is received from an oscillator.

4. The method of claim 1, wherein the intermediate frequency input is based at least in part on at least one of a zero intermediate frequency and samples of an intermediate frequency.

5. The method of claim 4, wherein the samples comprise at least one of a complex number sequence from two analog-to-digital converters and a real number sequence from one analog-to-digital converter.

6. The method of claim 1, wherein generating the filtered version of the reference clock input includes determining a phase error, the phase error being proportional to an accumulated phase difference between the reference clock input and the local oscillator feedback input.

7. The method of claim 1, wherein generating a phase error correction signal includes comparing a phase of the filtered version of the reference clock input to a phase of the local oscillator feedback input.

8. The method of claim 1, wherein generating the local oscillator output includes generating a local oscillator compensation signal at least in part by rotating the phase of the intermediate frequency input by a phase amount specified by the phase error correction signal.

9. The method of claim 8, wherein rotating the phase of the intermediate frequency input is at least in part calculated using a look up table.

10. The method of claim 8, wherein generating the local oscillator output further includes generating the local oscillator output at least in part by multiplying the intermediate frequency input with the local oscillator compensation signal.

11. The method of claim 8, wherein rotating the phase of the intermediate frequency input is at least in part calculated using a look up table.

12. The method of claim 8, wherein generating the local oscillator output further includes generating the local oscillator output at least in part by multiplying the intermediate frequency input with the local oscillator compensation signal.

13. A method for recovering information from a communications channel, the method comprising:

receiving the communications channel, an intermediate frequency, a reference clock input, and a local oscillator feedback input;

generating a filtered version of the reference clock input;

generating a phase error correction signal based at least in part on the filtered version of the reference clock input and a phase of the local oscillator feedback input;

generating the local oscillator output based at least in part on the intermediate frequency input and the phase error correction signal;

down converting the communications channel to the intermediate frequency based at least in part on the local oscillator output; and

determining a digital representation of the down converted communications channel at least in part by sampling the down converted communications channel.

14. The method of claim 13, wherein the local oscillator feedback input is based at least in part on at least one of the local oscillator output and a frequency divided version of the local oscillator feedback input.

15. The method of claim 13, wherein the reference clock input is received from an oscillator.

16. The method of claim 13, wherein the intermediate frequency input is based at least in part on at least one of a zero intermediate frequency and samples of an intermediate frequency.

17. The method of claim 16, wherein the samples comprise at least one of a complex number sequence from two analog-to-digital converters and a real number sequence from one analog-to-digital converter.

18. The method of claim 13, wherein generating the filtered version of the reference clock input includes determining a phase error, the phase error being proportional to an accumulated phase difference between the reference clock input and the local oscillator feedback input.

19. The method of claim 13, wherein generating a phase error correction signal includes comparing a phase of the filtered version of the reference clock input to a phase of the local oscillator feedback input.

20. The method of claim 13, wherein generating the local oscillator output includes generating a local oscillator compensation signal at least in part by rotating the phase of the intermediate frequency input by a phase amount specified by the phase error correction signal.