Device for use in inspecting a CPU and method thereof
First Claim
1. A method for inspecting a central processing unit (CPU), the method being adapted for use in an inspection device, the inspection device being electrically connected to the CPU and comprising a receiving interface and a processor, the method comprising the following steps of:
- (a) enabling the receiving interface to receive a first data stream from the CPU when the CPU executes a reference hardware inspection program in a first time interval;
(b) enabling the processor to set the first data stream as a good log;
(c) enabling the receiving interface to receive a second data stream from the CPU when the CPU executes the reference hardware inspection program in a second time interval;
(d) enabling the processor to set the second data stream as an erroneous log;
(e) enabling the processor to compare the good log with the erroneous log to determine a segment of the erroneous log as an erroneous range; and
(f) enabling the processor to determine a defect of the CPU according to the erroneous range;
wherein the CPU comprises a CPU core, a cache, a memory management unit (MMU) and a code interface, the CPU is electrically connected to a dynamic random access memory (DRAM) and a hard disk, the reference hardware inspection program is stored in the hard disk, the CPU core is configured to load the reference hardware inspection program into the cache and the DRAM to execute the reference hardware inspection program, the MMU is configured to record an address mapping relationship of the reference hardware inspection program among the cache, the DRAM and the hard disk, the erroneous range is a linear address range, the first data stream comprises a first code data stream, the second data stream comprises a second code data stream, the step (a) is to enable the receiving interface to receive the first code data stream from the code interface, and the step (c) is to enable the receiving interface to receive the second code data stream from the code interface.
1 Assignment
0 Petitions
Accused Products
Abstract
A device for use in inspecting a CPU and a method thereof are provided. The device comprises a receiving interface and a processor. The receiving interface receives a first data stream from the CPU when the CPU executes a reference hardware inspection program in a first time interval, and receives a second data stream from the CPU when the CPU executes the reference hardware inspection program in a second time interval. The processor sets the first data stream as a good log, and sets the second data stream as an erroneous log. The processor compares the good log and the erroneous log to determine a segment of the erroneous log as an erroneous range, and determine a defect of the CPU according to the erroneous range.
5 Citations
28 Claims
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1. A method for inspecting a central processing unit (CPU), the method being adapted for use in an inspection device, the inspection device being electrically connected to the CPU and comprising a receiving interface and a processor, the method comprising the following steps of:
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(a) enabling the receiving interface to receive a first data stream from the CPU when the CPU executes a reference hardware inspection program in a first time interval; (b) enabling the processor to set the first data stream as a good log; (c) enabling the receiving interface to receive a second data stream from the CPU when the CPU executes the reference hardware inspection program in a second time interval; (d) enabling the processor to set the second data stream as an erroneous log; (e) enabling the processor to compare the good log with the erroneous log to determine a segment of the erroneous log as an erroneous range; and (f) enabling the processor to determine a defect of the CPU according to the erroneous range; wherein the CPU comprises a CPU core, a cache, a memory management unit (MMU) and a code interface, the CPU is electrically connected to a dynamic random access memory (DRAM) and a hard disk, the reference hardware inspection program is stored in the hard disk, the CPU core is configured to load the reference hardware inspection program into the cache and the DRAM to execute the reference hardware inspection program, the MMU is configured to record an address mapping relationship of the reference hardware inspection program among the cache, the DRAM and the hard disk, the erroneous range is a linear address range, the first data stream comprises a first code data stream, the second data stream comprises a second code data stream, the step (a) is to enable the receiving interface to receive the first code data stream from the code interface, and the step (c) is to enable the receiving interface to receive the second code data stream from the code interface. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for inspecting a central processing unit (CPU), the method being adapted for use in an inspection device, the inspection device being electrically connected to the CPU and comprising a receiving interface and a processor, the method comprising the following steps of:
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(a) enabling the receiving interface to receive a first data stream from the CPU when the CPU executes a reference hardware inspection program in a first time interval; (b) enabling the processor to set the first data stream as a good log; (c) enabling the receiving interface to receive a second data stream from the CPU when the CPU executes the reference hardware inspection program in a second time interval; (d) enabling the processor to set the second data stream as an erroneous log; (e) enabling the processor to compare the good log with the erroneous log to determine a segment of the erroneous log as an erroneous range; and (f) enabling the processor to determine a defect of the CPU according to the erroneous range; wherein the CPU comprises a CPU core and a program counter interface, the first data stream comprises a first counter data stream, the second data stream comprises a second counter data stream, the step (a) is to enable the receiving interface to receive the first counter data stream from the program counter interface, and the step (c) is to enable the receiving interface to receive the second counter data stream from the program counter interface. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A device for use in inspecting a CPU, the device being electrically connected to the CPU and comprising:
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a receiving interface, being configured to receive a first data stream from the CPU when the CPU executes a reference hardware inspection program in a first time interval and receive a second data stream from the CPU when the CPU executes the reference hardware inspection program in a second time interval; and a processor, being configured to set the first data stream as a good log, set the second data stream as an erroneous log, compare the good log with the erroneous log to determine a segment of the erroneous log as an erroneous range and determine a defect of the CPU according to the erroneous range; wherein the CPU comprises a CPU core, a cache, an MMU and a code interface, the CPU is electrically connected to a DRAM and a hard disk, the reference hardware inspection program is stored in the hard disk, the CPU core is configured to load the reference hardware inspection program into the cache and the DRAM to execute the reference hardware inspection program, the MMU is configured to record an address mapping relationship of the reference hardware inspection program among the cache, the DRAM and the hard disk, the erroneous range is a linear address range, the first data stream comprises a first code data stream, the second data stream comprises a second code data stream, and the receiving interface is configured to receive the first code data stream and the second code data stream from the code interface of the CPU. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22)
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23. A device for use in inspecting a CPU, the device being electrically connected to the CPU and comprising:
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a receiving interface, being configured to receive a first data stream from the CPU when the CPU executes a reference hardware inspection program in a first time interval and receive a second data stream from the CPU when the CPU executes the reference hardware inspection program in a second time interval; and a processor, being configured to set the first data stream as a good log, set the second data stream as an erroneous log, compare the good log with the erroneous log to determine a segment of the erroneous log as an erroneous range and determine a defect of the CPU according to the erroneous range; wherein the CPU comprises a CPU core and a program counter interface, the first data stream comprises a first counter data stream, the second data stream comprises a second counter data stream, and the receiving interface is configured to receive the first counter data stream and the second counter data stream from the program counter interface. - View Dependent Claims (24, 25, 26, 27, 28)
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Specification