Field effect transistor having conductor electrode in contact with semiconductor layer

• US 8,492,853 B2
• Filed: 01/26/2011
• Issued: 07/23/2013
• Est. Priority Date: 02/10/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Takemura, Yasuhiko
• Primary Examiner(s): Pham, Thanh V
• Application Number:
  US13/014,061
• Publication Number:
  US 20110193078A1
• Time in Patent Office: 909 Days
• Field of Search: 257/288, 257/412, 257/E29.255, 257/E21.41, 438/149
• US Class Current: 257/412
• CPC Class Codes: H01L 29/7839 with Schottky drain or source contact
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

An object is to provide a structure with which the off-state current of a field effect transistor including a conductor-semiconductor junction can be reduced. A semiconductor layer is provided in contact with a first conductor electrode and a second conductor electrode which include a material with a work function that is at the same level as or lower than the electron affinity of the semiconductor layer. A third conductor electrode is formed using a material whose work function is higher than the electron affinity of the semiconductor layer to be in contact with a surface of the semiconductor layer opposite to a surface provided with a gate and to cross the semiconductor layer, so that a Schottky barrier junction is formed in the semiconductor layer. The carrier concentration of the portion including the Schottky barrier junction is extremely low; thus, the off-state current can be reduced.

Claims

1. A field effect transistor comprising:

a semiconductor layer including a first surface and a second surface opposed to the first surface;

a first conductor electrode in contact with the first surface of the semiconductor layer;

a second conductor electrode in contact with the first surface of the semiconductor layer;

a gate provided over the second surface of the semiconductor layer; and

a third conductor electrode in contact with the first surface of the semiconductor layer and between the first conductor electrode and the second conductor electrode so as to cross the semiconductor layer,

wherein a material of the semiconductor layer is an oxide semiconductor.

2. The field effect transistor according to claim 1, further comprising a fourth conductor electrode provided in contact with the first surface, so as to cross the semiconductor layer and be apart from the third conductor electrode.

3. The field effect transistor according to claim 2,

wherein the third conductor electrode is in contact with one of the first conductor electrode and the second conductor electrode, and

wherein the fourth conductor electrode is in contact with the other of the first conductor electrode and the second conductor electrode.

4. The field effect transistor according to claim 2,

wherein the third conductor electrode is kept at the same potential as one of the first conductor electrode and the second conductor electrode, and

wherein the fourth conductor electrode is kept at the same potential as the other of the first conductor electrode and the second conductor electrode.

5. The field effect transistor according to claim 1,

wherein the third conductor electrode is kept at the same potential as one of the first conductor electrode and the second conductor electrode.

6. The field effect transistor according to claim 1,

wherein the semiconductor layer comprises a first doped region and a second doped region that include a donor or an acceptor at a high concentration.

7. The field effect transistor according to claim 6,

wherein concentrations of the donor or the acceptor in the first doped region and the second doped region are higher than or equal to 1×

10¹⁸/cm³ and lower than 1×

10²¹/cm³.

8. The field effect transistor according to claim 1,

wherein work functions of portions of the first conductor electrode and the second conductor electrode, which are in contact with the semiconductor layer, are lower than a sum of an electron affinity of the semiconductor layer and 0.3 electron volts.

9. The field effect transistor according to claim 1,

wherein a junction between the first conductor electrode and the semiconductor layer and a junction between the second conductor electrode and the semiconductor layer are each an ohmic junction.

10. The field effect transistor according to claim 1,

wherein a work function of a portion of the third conductor electrode, which is in contact with the semiconductor layer, is higher than a sum of an electron affinity of the semiconductor layer and 0.6 electron volts.

11. The field effect transistor according to claim 1,

wherein a junction between the third conductor electrode and the semiconductor layer is a Schottky barrier junction.

12. The field effect transistor according to claim 1, further comprising a gate insulating film between the semiconductor layer and the gate.