Sputtering target and manufacturing method thereof, and transistor

• US 8,492,862 B2
• Filed: 11/12/2010
• Issued: 07/23/2013
• Est. Priority Date: 11/13/2009
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Takayama, Toru, Sato, Keiji
• Primary Examiner(s): Nhu, David
• Application Number:
  US12/945,421
• Publication Number:
  US 20110114944A1
• Time in Patent Office: 984 Days
• Field of Search: 257/430, 257/421, 257/425, 257/347, 257/428, 257/189, 257/200, 257/201, 257/52, 257/58, 257/62, 257/E21.006, 257/E21.077, 257/E21.085, 257/E21.091, 257/E21.126, 257/E21.127, 257/E21.212, 257/E21.304, 257/E21.329, 257/E21.347, 257/E21.17, 257/E21.37
• US Class Current: 257/430
• CPC Class Codes: B29C 31/008 Handling preformed parts, e.g. inserts B29C37/001 takes precedence; for injection moulding B29C45/14008; for blow moulding B29C49/2408; for thermoforming B29C51/165
• CPC Class Codes: C04B 2111/00844 for electronic applications
• CPC Class Codes: C04B 2235/3284 Zinc oxides, zincates, cadmium oxides, cadmiates, mercury oxides, mercurates or oxide forming salts thereof
• CPC Class Codes: C04B 2235/3286 Gallium oxides, gallates, indium oxides, indates, thallium oxides, thallates or oxide forming salts thereof, e.g. zinc gallate
• CPC Class Codes: C04B 2235/3418 Silicon oxide, silicic acids or oxide forming salts thereof, e.g. silica sol, fused silica, silica fume, cristobalite, quartz or flint
• CPC Class Codes: C04B 2235/658 Atmosphere during thermal treatment
• CPC Class Codes: C04B 2235/662 Annealing after sintering
• CPC Class Codes: C04B 2235/666 Applying a current during sintering, e.g. plasma sintering [SPS], electrical resistance heating or pulse electric current sintering [PECS]
• CPC Class Codes: C04B 2235/77 Density
• CPC Class Codes: C04B 35/01 based on oxide ceramics
• CPC Class Codes: C04B 35/04 based on magnesium oxide
• CPC Class Codes: C04B 35/10 based on aluminium oxide
• CPC Class Codes: C04B 35/453 based on zinc, tin, or bismuth oxides or solid solutions thereof with other oxides, e.g. zincates, stannates or bismuthates
• CPC Class Codes: C04B 35/457 based on tin oxides or stannates
• CPC Class Codes: C04B 35/645 Pressure sintering
• CPC Class Codes: C04B 35/6455 Hot isostatic pressing
• CPC Class Codes: C04B 41/0072 Heat treatment
• CPC Class Codes: C04B 41/009 characterised by the material treated
• CPC Class Codes: C04B 41/4517 application under inert, e.g. non-oxidising, atmosphere
• CPC Class Codes: C04B 41/53 involving the removal of at least part of the materials of the treated article, e.g. etching, drying of hardened concrete C04B41/0036 - C04B41/0054 take precedence
• CPC Class Codes: C04B 41/80 : of only ceramics
• CPC Class Codes: C23C 14/10 : Glass or silica
• CPC Class Codes: C23C 14/3414 : Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
• CPC Class Codes: C23C 14/564 : Means for minimising impurities in the coating chamber such as dust, moisture, residual gases
• CPC Class Codes: H01J 2237/332 : Coating
• CPC Class Codes: H01J 37/3429 : Plural materials
• CPC Class Codes: H01L 21/0242 : Crystalline insulating materials
• CPC Class Codes: H01L 21/02422 : Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02488 : Insulating materials
• CPC Class Codes: H01L 21/02554 : Oxides
• CPC Class Codes: H01L 21/02565 : Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 : Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 29/41733 : for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 : for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/45 : Ohmic electrodes
• CPC Class Codes: H01L 29/66742 : Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 : of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78618 : characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure silicide contacts, electrodes in general H01L29/458
• CPC Class Codes: H01L 29/7869 : having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×10¹⁶ atoms/cm³, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H₂O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.

Claims

1. A sputtering target comprising:

a sintered body of at least one metal oxide selected from magnesium oxide, zinc oxide, aluminum oxide, gallium oxide, indium oxide, and tin oxide,

wherein the sintered body is subjected to a heat treatment after washing the sintered body, and

wherein a concentration of hydrogen atoms contained in the sintered body is lower than 1×

10¹⁶ atoms/cm³.

2. The sputtering target according to claim 1, wherein the sintered body is a sintered body of indium oxide, gallium oxide, and zinc oxide.

3. The sputtering target according to claim 1, further comprising a silicon oxide, wherein the silicon oxide is added to the sputtering target at 0.1 wt % to 20 wt % inclusive.

4. A transistor comprising an oxide semiconductor layer which is formed using a sputtering target,

wherein the sputtering target includes at least one metal oxide selected from magnesium oxide, zinc oxide, aluminum oxide, gallium oxide, indium oxide, and tin oxide,

wherein a concentration of hydrogen atoms contained in the oxide semiconductor layer is lower than 1×

10¹⁶ atoms/cm³.

5. The transistor according to claim 4, wherein the oxide semiconductor layer is a mixed layer of indium oxide, gallium oxide, and zinc oxide.

6. The transistor according to claim 4, wherein the oxide semiconductor layer comprises a silicon oxide, wherein the silicon oxide is added to the sputtering target at 0.1 wt % to 20 wt % inclusive.

7. A transistor comprising:

an oxide semiconductor layer which is formed using a sputtering target;

a source electrode;

a drain electrode;

a gate electrode; and

a gate insulating film,

wherein the sputtering target includes at least one metal oxide selected from magnesium oxide, zinc oxide, aluminum oxide, gallium oxide, indium oxide, and tin oxide,

wherein a concentration of hydrogen atoms contained in the oxide semiconductor layer is lower than 1×

10¹⁶ atoms/cm³.

8. The transistor according to claim 7, wherein the oxide semiconductor layer is a mixed layer of indium oxide, gallium oxide, and zinc oxide.

9. The transistor according to claim 7, wherein the oxide semiconductor layer comprises a silicon oxide, wherein the silicon oxide is added to the sputtering target at 0.1 wt % to 20 wt % inclusive.

10. The transistor according to claim 7, wherein the gate insulating film is located over the gate electrode.

11. The transistor according to claim 7,

wherein the oxide semiconductor layer includes a channel formation region, and

wherein a resistance of the channel formation region is higher than that of a region which is in the oxide semiconductor layer and is overlapped with the source electrode or the drain electrode.

12. The transistor according to claim 7,

wherein one of the source electrode and the drain electrode is located over the oxide semiconductor layer, and

wherein the other of the source electrode and the drain electrode is located below the oxide semiconductor layer.

13. A semiconductor device comprising:

a substrate;

a transistor comprising an oxide semiconductor layer which is formed using a sputtering target, the transistor being over the substrate; and

a wiring layer electrically connected to the transistor,

wherein the sputtering target includes at least one metal oxide selected from magnesium oxide, zinc oxide, aluminum oxide, gallium oxide, indium oxide, and tin oxide,

wherein a concentration of hydrogen atoms contained in the oxide semiconductor layer is lower than 1×

10¹⁶ atoms/cm³.

14. The semiconductor device according to claim 13, wherein the oxide semiconductor layer is a mixed layer of indium oxide, gallium oxide, and zinc oxide.

15. The semiconductor device according to claim 13, wherein the oxide semiconductor layer comprises a silicon oxide, wherein the silicon oxide is added to the sputtering target at 0.1 wt % to 20 wt % inclusive.

16. The semiconductor device according to claim 13, wherein the transistor further comprises a gate electrode, a gate insulating film, a drain electrode, and a source electrode.

17. The semiconductor device according to claim 16, wherein the gate insulating film is located over the gate electrode.

18. The semiconductor device according to claim 16,

wherein the oxide semiconductor layer includes a channel formation region, and

wherein a resistance of the channel formation region is higher than that of a region which is in the oxide semiconductor layer and is overlapped with the source electrode or the drain electrode.

19. The semiconductor device according to claim 16,

wherein one of the source electrode and the drain electrode is located over the oxide semiconductor layer, and

wherein the other of the source electrode and the drain electrode is located below the oxide semiconductor layer.

20. The semiconductor device according to claim 19, wherein a part of the oxide semiconductor layer is sandwiched between the wiring layer and the other of the source electrode and the drain electrode.