Storage circuitry and method with increased resilience to single event upsets

• US 8,493,120 B2
• Filed: 03/10/2011
• Issued: 07/23/2013
• Est. Priority Date: 03/10/2011
• Status: Active Grant

• Current Assignee: Arm Limited (SoftBank Group Corp.)
• Original Assignee: Arm Limited (SoftBank Group Corp.)
• Inventors: Choudhury, Mihir Rajanikant, Chandra, Vikas
• Primary Examiner(s): Donovan, Lincoln
• Assistant Examiner(s): Chen, Sibin
• Application Number:
  US13/064,207
• Publication Number:
  US 20120229187A1
• Time in Patent Office: 866 Days
• Field of Search: 327199-203, 327/208, 327210-215, 327/218
• US Class Current: 327/203
• CPC Class Codes: G11C 11/4125 Cells incorporating circuit means for protecting against loss of information
• CPC Class Codes: G11C 5/005 Circuit means for protection against loss of information of semiconductor storage devices

Abstract

Storage circuitry is provided with increased resilience to single event upsets, along with a method of operation of such circuitry. The storage circuitry has a first storage block configured in at least one mode of operation to perform a first storage function, and a second storage block configured in at least one mode of operation to perform a second storage function distinct from said first storage function. Configuration circuitry is responsive to a predetermined mode of operation where the second storage function is unused, to configure the second storage block to operate in parallel with the first storage block. By arranging the two storage blocks in parallel when one of the storage blocks is otherwise performing no useful function, this in effect increases the size of the storage block that is still performing the useful storage function, and as a result increases its resilience to single event upsets. Such an approach has minimal area and power consumption overhead, and provides a small storage circuit that can be readily used in a wide variety of sequential cell designs.

Claims

1. Storage circuitry comprising:

a first storage block configured, in at least one mode of operation, to store data to perform a first function;

a second storage block configured, in at least one mode of operation, to store said data to perform a second function distinct from said first function; and

configuration circuitry, responsive to a predetermined mode of operation where said second function is unused, to re-configure said second storage block to store said data in parallel with said first storage block data to increase resilience of said first storage block to single event upsets (SEUs) whilst performing said first function during said predetermined mode of operation, wherein;

one of said at least one modes of operation is a normal mode of operation;

said first storage block is configured to perform said first function by operating as a master latch of a flip-flop during said normal mode of operation, and said second storage block is configured to perform said second function by operating as a slave latch of said flip-flop during said normal mode of operation;

said predetermined mode of operation is a standby mode of operation where said first storage block performs said first function to retain a data value, and said second function is unused.

2. Storage circuitry as claimed in claim 1, wherein:

said first storage block is configured as a latch to perform said first function;

in said predetermined mode of operation, said configuration circuitry is arranged to re-configure said second storage block as an additional latch in parallel with said first storage block, such that said first storage block and said second storage block collectively form a twin latch for performing said first function during said predetermined mode of operation.

3. Storage circuitry as claimed in claim 1, wherein said configuration circuitry comprises switch circuitry that is responsive to a current mode of operation being said predetermined mode of operation to switch said second storage block into a parallel arrangement with respect to said first storage block.

4. Storage circuitry as claimed in claim 3, wherein said switch circuitry is responsive to said current mode of operation not being said predetermined mode of operation to decouple said second storage block from said first storage block.

5. Storage circuitry comprising:

a first storage block configured, in at least one mode of operation, to store data to perform a first function;

a second storage block configured, in at least one mode of operation, to store said data to perform a second function distinct from said first function; and

configuration circuitry, responsive to a predetermined mode of operation where said second function is unused, to re-configure said second storage block to store said data in parallel with said first storage block data to increase resilience of said first storage block to single event upsets (SEUs) whilst performing said first function during said predetermined mode of operation, wherein;

one of said at least one modes of operation is a normal mode of operation;

said first storage block is configured to perform said first function by operating as a slave latch of a flip-flop during said normal mode of operation, and said second storage block is configured to perform said second function by operating as a master latch of said flip-flop during said normal mode of operation;

said predetermined mode of operation is a standby mode of operation where said first storage block performs said first function to retain a data value, and said second function is unused.

6. Storage circuitry comprising:

a first storage block configured, in at least one mode of operation, to store data to perform a first function;

a second storage block configured, in at least one mode of operation, to store said data to perform a second function distinct from said first function; and

configuration circuitry, responsive to a predetermined mode of operation where said second function is unused, to re-configure said second storage Hock to store said data in parallel with said first storage block data to increase resilience of said first storage block to single event upsets (SEUs) whilst performing said first unction during said predetermined mode of operation, wherein;

one of said at least one modes of operation is a state retention mode;

said second storage block is configured to perform said second function by operating as a state retention latch in said state retention mode in order to retain a data value whilst said first storage block is powered down;

said predetermined mode of operation is a normal mode of operation where said second function is unused; and

said first storage block is configured to perform said first function by operating as a latch of a flip-flop during said normal mode of operation.

7. Storage circuitry as claimed in claim 6, wherein said first storage block is configured to perform said first function by operating as a master latch of a flip-flop during said normal mode of operation.

8. Storage circuitry as claimed in claim 6, wherein said first storage block is configured to perform said first function by operating as one of a master latch and a slave latch of a flip-flop during said normal mode of operation, and the storage circuitry further comprises:

a third storage block configured in said normal mode of operation to perform a third function by operating as the other of a master latch and a slave latch of said flip-flop, so that collectively said first storage block and said third storage block provide the master latch and the slave latch of the flip-flop during said normal mode of operation;

in a standby mode of operation, said third function being unused; and

said configuration circuitry being further arranged to be responsive to said standby mode of operation to re-configure the third storage block to store said data in parallel with said first storage block to increase resilience of said first storage block to single event upsets whilst performing said first function during said standby mode of operation.

9. Storage circuitry comprising:

a first storage Hock configured, in at least one mode of operation, to store data to perform a first function;

a second storage block configured, in at least one mode of operation, to store said data to perform a second function distinct from said first function; and

configuration circuitry responsive to a predetermined mode of operation where said second function is unused, to re-configure said second storage block to store said data in parallel with said first storage block data to increase resilience of said first storage block to single event upsets (SEUs) whilst performing said first function during said predetermined mode of operation,

wherein said configuration circuitry comprises switch circuitry that is responsive to a current mode of operation being said predetermined mode of operation to switch said second storage block into a parallel arrangement with respect to said first storage block,

wherein said switch circuitry is responsive to said current mode of operation not being said predetermined mode of operation to switch said second storage block into a serial arrangement with respect to said first storage block.

10. Storage circuitry comprising:

a first storage block configured, in at least one mode of operation, to store data to perform a first function;

a second storage block configured, in at least one mode of operation, to store said data to perform a second function distinct from said first function; and

configuration circuitry, responsive to a predetermined mode of operation where said second function is unused, to re-configure said second storage block to store said data in parallel with said first storage block data to increase resilience of said first storage block to single event upsets (SEUs) whilst performing said first function during said predetermined mode of operation,

wherein said configuration circuitry comprises switch circuitry that is responsive to a current mode of operation being said predetermined mode of operation to switch said second storage block into a parallel arrangement with respect to said first storage block,

wherein;

said configuration circuitry further comprises control circuitry for generating an internal signal from a clock signal provided to said configuration circuitry; and

said second storage block includes a switch element which is controlled by the internal signal to selectively configure the second storage block as a latch dependent on a value of said internal signal;

such that when said current mode of operation is said predetermined mode of operation, the switch circuitry switches said second storage block into a parallel arrangement with respect to said first storage block, and the internal signal is set to a value causing the switch element to configure the second storage block as a latch.

11. A method of operating storage circuitry having a first storage block configured in at least one mode of operation to store data to perform a first function, and a second storage block configured in at least one mode of operation to store said data to perform a second function distinct from said first function, the method comprising:

responsive to a predetermined mode of operation where said second function is unused, re-configuring said second storage block to store said data in parallel with said data stored in said first storage block to increase resilience of said first storage block to single event upsets (SEUs) whilst performing said first function during said predetermined mode of operation, wherein;

one of said at least one modes of operation is a normal mode of operation;

said first storage block is configured to perform said first function by operating as a master latch of a flip-flop during said normal mode of operation, and said second storage block is configured to perform said second function by operating as a slave latch of said flip-flop during said normal mode of operation;

said predetermined mode of operation is a standby mode of operation where said first storage block performs said first function to retain a data value, and said second function is unused.

12. Storage circuitry comprising:

a first storage means for storing data to perform a first function in at least one mode of operation;

a second storage means for storing said data to perform a second function in at least one mode of operation, the second function being distinct from said first function; and

configuration means, responsive to a predetermined mode of operation where said second function is unused, for re-configuring said second storage means to store said data in parallel with said data stored in said first storage means to increase resilience of said first storage means to single event upsets (SEUs) whilst performing said first function during said predetermined mode of operation, wherein;

one of said at least one modes of operation is a normal mode of operation;

said first storage means is configured to perform said first function by operating as a master latch of a flip-flop during said normal mode of operation, and said second storage means is configured to perform said second function by operating as a slave latch of said flip-flop during said normal mode of operation;

said predetermined mode of operation is a standby mode of operation where said first storage means performs said first function to retain a data value, and said second function is unused.