Display panel and method of manufacturing the same

• US 8,493,540 B2
• Filed: 12/15/2008
• Issued: 07/23/2013
• Est. Priority Date: 12/15/2008
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Han, Kyoung-Tai, Kim, Jang-Soo, Yang, Byung-Duk
• Primary Examiner(s): CHIEN, LUCY P
• Application Number:
  US12/335,095
• Publication Number:
  US 20100149464A1
• Time in Patent Office: 1,681 Days
• Field of Search: 349/106, 349/144, 349/155
• US Class Current: 349/155
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136222 Colour filters incorporated in the active matrix substrate
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs

Abstract

A display panel comprises a first substrate, a second substrate including a display area and a peripheral area surrounding the display area, a transistor layer including, formed in the display area of the substrate, at least one transistor connected to a gate line and a data line, at least one color filter formed in a plurality of pixel regions on the transistor layer, a light blocking member disposed between the color filters, at least one pixel electrode formed on the color filter, an opaque spacing part formed on the color filter corresponding to the transistor so as to maintain a cell gap between the first and second substrates. The light blocking member in some embodiments of the invention is not formed on the first and second transistors to allow for inspection of a channel in the transistor.

Claims

1. A display panel comprising:

a first substrate;

a second substrate including a display area and a peripheral area surrounding the display area;

a transistor layer located in the display area of the substrate, the transistor layer comprising at least one transistor connected to a gate line and a data line;

at least one color filter located in a pixel region on the transistor layer;

a light blocking member disposed between the color filters;

at least one pixel electrode located on the color filter;

an opaque spacing part located on the color filter and overlapping the transistor so as to maintain a cell gap between the first and second substrates,

wherein the pixel electrode comprises a first sub-pixel electrode and a second sub-pixel electrode separated from each other,

wherein at least one of the first sub-pixel and the second sub-pixel has micro slits of which the width is below 2.5 times of the cell gap.

2. The display panel of claim 1, wherein the color filter is thinner than the light blocking member.

3. The display panel of claim 1, further comprising a passivation layer located on the color filter and the light blocking layer.

4. The display panel of claim 3, wherein the passivation layer is an organic material or inorganic material.

5. The display panel of claim 1, wherein the light blocking member is not formed on the transistor.

11. The display panel of claim 1, wherein the light blocking member does not overlap the transistor.

13. The display panel of claim 1, wherein the light blocking member extends farther away from the first substrate than the color filter.

6. A method of manufacturing an array substrate, the method

comprising:

forming a substrate including a display area and a peripheral area surrounding the display area;

forming a transistor layer in the display area of the substrate, the transistor layer including at least one transistor connected to a gate line and a data line and a circuit layer including a metal pattern in the peripheral area;

forming at least one color filter on the transistor layer;

forming a light blocking member disposed between the color filters;

forming at least one of pixel electrode on the color filter; and

forming an opaque spacing part on the color filter and overlapping the transistor so as to maintain a cell gap,

wherein the pixel electrode comprises a first sub-pixel electrode and a second sub-pixel electrode separated from each other,

wherein at least one of the first sub-pixel and the second sub-pixel has at least first and second domains which have micro slits, and

wherein the micro slits of the first domain extend in a different direction from the micro slits of the second domain.

7. The method of claim 6, wherein the color filter is formed by an inkjet method after the light blocking member is formed, and the color filter is thinner than the light blocking member.

8. The method of claim 6, further comprising forming a passivation layer on the color filter and the light blocking layer.

9. The method of claim 6, wherein the light blocking member is not formed on the transistor.

10. The method of claim 9, further comprising inspecting and repairing the defect of the transistors.

12. The method of claim 6, wherein a light blocking member is formed not overlapping the transistor.

14. The method of claim 6, wherein a light blocking member is formed to extend farther away from the substrate than the color filter.

15. A display panel comprising:

a first substrate;

a second substrate including a display area and a peripheral area surrounding the display area;

a transistor layer located in the display area of the substrate, the transistor layer comprising at least one transistor connected to a gate line and a data line;

at least one color filter located in a pixel region on the transistor layer;

a light blocking member disposed between side surfaces defining the color filters and overlapping top surfaces defining the color filters;

at least one pixel electrode located on the color filter;

an opaque spacing part located on the color filter corresponding to the transistor so as to maintain a cell gap between the first and second substrates,

wherein the light blocking member does not overlap the transistor, and

wherein the opaque spacing part is a single uniform opaque layer.

16. The display panel of claim 15, wherein the color filter is thinner than the light blocking member.

17. The display panel of claim 15, wherein the pixel electrode comprises a first sub-pixel electrode and a second sub-pixel electrode separated from each other.

18. The display panel of claim 15, wherein the pixel electrode overlaps at least a portion of the transistor.

22. The display panel of claim 15, wherein the at least one pixel electrode is located over the color filter and the light blocking member.

19. A display panel comprising:

a first substrate;

a plurality of gate lines disposed on the first substrate;

a plurality of data lines disposed on the first substrate and intersecting the gate lines;

a plurality of color filters disposed on the first substrate;

a light blocking member disposed between side surfaces of the color filters; and

a spacing part located on the color filters,

wherein the light blocking member overlaps top surfaces of two color filters of the plurality of color filters and two data lines of the plurality of data lines disposed on both sides of the light blocking member, and

wherein the spacing part is a single uniform opaque layer.

20. The display panel of claim 19, wherein the spacing part is opaque.

21. The display panel of claim 20, further comprising a transistor connected to the gate lines and the data lines, wherein the spacing part is located to overlap the transistor.