Highly integrated media access control
First Claim
1. An apparatus to process an ingress signal within a media access controller integrated circuit (MAC IC), comprising:
- an ingress processor configured to format the ingress signal for delivery of information data to a destination node, the ingress processor including;
a direct memory access unit configured to receive the ingress signal from a memory; and
a downstream processor configured to format the received ingress signal according to a transmission protocol associated with the destination node to provide a formatted signal, the downstream processor including;
a payload header suppressor configured to receive a packet header along with the received ingress signal, and to suppress the packet header based on information included in the received ingress signal; and
a header processor configured to create a new header based on the information.
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Accused Products
Abstract
A supervisory communications device, such as a headend device within a communications network, monitors and controls communications with a plurality of remote communications devices throughout a widely distributed network. The supervisory device allocates bandwidth on the upstream channels by sending MAP messages over its downstream channel. A highly integrated media access controller integrated circuit (MAC IC) operates within the headend to provide lower level processing on signals exchanged with the remote devices. The enhanced functionality of the MAC IC relieves the processing burden on the headend CPU and increases packet throughput. The enhanced functionality includes header suppression and expansion, DES encryption and decryption, fragment reassembly, concatenation, and DMA operations.
104 Citations
28 Claims
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1. An apparatus to process an ingress signal within a media access controller integrated circuit (MAC IC), comprising:
an ingress processor configured to format the ingress signal for delivery of information data to a destination node, the ingress processor including; a direct memory access unit configured to receive the ingress signal from a memory; and a downstream processor configured to format the received ingress signal according to a transmission protocol associated with the destination node to provide a formatted signal, the downstream processor including; a payload header suppressor configured to receive a packet header along with the received ingress signal, and to suppress the packet header based on information included in the received ingress signal; and a header processor configured to create a new header based on the information. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An apparatus to process an ingress signal within a media access controller integrated circuit (MAC IC), comprising:
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means for formatting the ingress signal for delivery of information data to a destination node, the means for formatting the ingress signal including, means for receiving the ingress signal from a memory; and means for formatting the received ingress signal according to a transmission protocol associated with the destination node to provide a formatted signal, the means for formatting the received ingress signal including; means for receiving a packet header along with the received ingress signal, and for suppressing the packet header based on information included in the received ingress signal; and means for creating a new header based on the information included in the received ingress signal. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for processing an ingress signal within a media access controller integrated circuit (MAC IC), comprising:
formatting, by the MAC IC, the ingress signal according to a transmission protocol associated with a destination node, the formatting including; receiving, by the MAC IC, a packet header along with the ingress signal, and suppressing, by the MAC IC, the packet header based on information included in the ingress signal; receiving, by the MAC IC, the suppressed packet header, creating a new header based on the information included in the ingress signal; and outputting, by the MAC IC, a formatted signal. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28)
Specification