Data storage apparatus and data writing/reading method

• US 8,495,468 B2
• Filed: 01/27/2011
• Issued: 07/23/2013
• Est. Priority Date: 03/16/2010
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Dachiku, Kenshi
• Primary Examiner(s): Alphonse, Fritz
• Application Number:
  US13/014,938
• Publication Number:
  US 20110231737A1
• Time in Patent Office: 908 Days
• Field of Search: 714/770, 714/782, 714/784, 714/781, 714/769, 714/42
• US Class Current: 714/770
• CPC Class Codes: G06F 11/1044 with specific ECC/EDC distribution
• CPC Class Codes: G06F 11/108 Parity data distribution in semiconductor storages, e.g. in SSD
• CPC Class Codes: G06F 2211/1057 Parity-multiple bits-RAID6, i.e. RAID 6 implementations

Abstract

According to one embodiment, a data storage apparatus including memory chips includes an error correction encoder, a RAID controller, error detectors and memory units. Each of the memory chips includes a semiconductor memory. The error correction encoder adds an error correction code to an encoded data stream. The RAID controller divides the encoded data stream from the error correction encoder into data blocks. The RAID controller generates a parity data block based on the data blocks. The RAID controller outputs the data blocks and parity data block to the error detectors, respectively. The error detectors add an error detection code to the data blocks and parity data block output from the RAID controller. Each of the memory units includes the memory chips. The memory units write the data blocks and parity data block from the error detectors to the memory chips.

Claims

1. A data storage apparatus comprising memory chips which enable data write in units of one page, each of the memory chips comprising a semiconductor memory, the data storage apparatus comprising:

an error correction encoder configured to add an error correction code to an encoded data stream;

a RAID (Redundant Arrays of Independent Disks) controller comprising a plurality of connection interfaces and configured to;

divide the encoded data stream output from the error correction encoder into data blocks, each of which corresponds to the page;

generate a parity data block based on the data blocks; and

output the data blocks and parity data block to the connection interfaces, respectively;

a plurality of error detectors connected to the connection interfaces, respectively, and configured to add an error detection code to the data blocks and parity data block output from the connection interfaces;

a plurality of memory units connected to the error detectors, respectively, each of the memory units comprising the memory chips, and the memory units being configured to write the data blocks and parity data block output from the error detectors to the memory chips in units of the page.

2. The data storage apparatus of claim 1, wherein

the memory units read the data blocks and parity data block written to the memory chips;

the error detectors output the data blocks and parity data block read by the memory units to the RAID controller, determine whether the data blocks and parity data block include an error based on the error detection code, and output a detection signal to the RAID controller when the data blocks and parity data block include an error,

when the RAID controller receives a detection signal, the RAID controller restores a data block output from an error detector which has output the detection signal based on other data blocks and the parity data block, and synthesizes a restored data block and said other data blocks to generate an encoded data stream,

when the RAID controller does not receive a detection signal, the RAID controller synthesizes the data blocks to generate an encoded data stream, and

the data storage apparatus further comprises an error correction decoder configured to correct an error in the encoded data stream output from the RAID controller based on the error correction code.

3. The data storage apparatus of claim 1, wherein

the memory units further comprise bit error correction units configured to add a bit error correction code to the data blocks and parity data block output from the error detectors.

4. The data storage apparatus of claim 2, wherein

the memory units further comprise bit error correction units configured to add a bit error correction code to the data blocks and parity data block output from the error detectors, and correct a bit error in the data blocks and parity data block read from the memory chips based on the bit error correction code.

5. A method of writing data on and reading from a data storage apparatus comprising memory chips on which the data is written in units of one page, the method comprising:

adding, by an error correction encoder, an error correction code to an encoded data stream;

dividing, by RAID (Redundant Arrays of Independent Disks) controller, the encoded data stream to which the error correction code has been added into data blocks, each of which corresponds to the page;

generating, by the RAID controller, a parity data block based on the data blocks;

adding, by error detectors, an error detection code to the data blocks and parity data block;

writing, by memory units comprising the memory chips, the data blocks and parity data block to which the error detection code has been added to the memory chips in units of the page.

6. The method of claim 5, the method comprising:

reading, by the memory units, the data blocks and parity data block written to the memory chips;

determining, by the error detectors, whether the data blocks and parity data block include an error based on the error detection code;

when a data block includes an error, restoring the data block based on other data blocks and the parity data block, and synthesizing a restored data block and said other data blocks to generate an encoded data stream by the RAID controller;

when the data blocks do not include an error, synthesizing the data blocks to generate an encoded data stream by the RAID controller; and

correcting, by an error correction decoder, an error in the generated encoded data stream based on the error correction code.

7. A data storage apparatus comprising memory chips, each of which comprises a semiconductor memory, the data storage apparatus comprising:

a RAID (Redundant Arrays of Independent Disks) controller comprising a plurality of connection interfaces and configured to divide an encoded data stream into data blocks, generate a parity data block based on the data blocks, and output the data blocks and parity data block to the connection interfaces, respectively;

a plurality of error detectors connected to the connection interfaces, respectively, and configured to add an error detection code to the data blocks and parity data block output from the connection interfaces;

a plurality of memory units respectively connected to the error detectors and comprising;

error correction units configured to add an error correction code to the data blocks and parity data block output from the error detectors; and

serial-to-parallel converters configured to divide the data blocks and parity data block to which the error correction code has been added into data items of a predetermined capacity, each of the memory units comprising a plurality of memory chips configured to store the data items in parallel.

8. The data storage apparatus of claim 7, wherein

the memory units read the data items recoded in the memory chips in parallel, synthesize the data items to generate the data block and parity data block by means of the serial-to-parallel converters, and correct an error in the data blocks and parity data block, by the error correction unit based on the error correction code;

the error detectors output the data blocks and parity data block output from the memory units to the RAID controller, determine whether the data blocks and parity data block include an error based on the error detection code, and output a detection signal to the RAID controller when the data blocks and parity data block include an error;

when the RAID controller receives a detection signal, the RAID controller restores a data block output from an error detector which has output the detection signal based on other data blocks and the parity data block, and synthesizes a restored data block and other data blocks to generate an encoded data stream; and

when the RAID controller does not receive a detection signal, the RAID controller synthesizes the data blocks to generate an encoded data stream.

9. The data storage apparatus of claim 7, wherein

the error correction units add the error correction code to the data blocks and parity data block from the error detectors so that a total code length of the error correction code and each of the data blocks and parity data block is an integer multiple of the number of parallel memory chips.

10. The data storage apparatus of claim 7, wherein

the error correction units add an M-byte error correction code so that a total code length of the error correction code and each of the data blocks and parity data block output from the error detectors corresponds to the number N of parallel memory chips whenever a data block or parity data block of (N−

M) bytes is received.

11. The data storage apparatus of claim 7, wherein

the error correction code added by the error detectors comprises bytes equal in number to parallel memory chips of the memory chips to the data blocks and parity data block output from the connection interfaces.

12. A method of writing data on and reading from a data storage apparatus comprising memory chips, the method comprising:

dividing, by a RAID (Redundant Arrays of Independent Disks) controller, an encoded data stream into data blocks;

generating, by the RAID controller, a parity data block based on the data blocks;

adding, by error detectors, an error detection code to the data blocks and parity data block;

adding, by memory units, an error correction code to the data blocks and parity data block to which the error detection code has been added;

dividing, by the memory units, the data blocks and parity data block to which the error correction code has been added into data items of a predetermined capacity; and

storing, by the memory units, the data items in the memory chips in parallel.

13. The method of claim 12, the method comprising:

reading, by the memory units, the data items stored in the memory chips in parallel;

synthesizing, by the memory units, the read data items to generate the data blocks and parity data block,

correcting, by the memory units, an error in the data blocks and parity data block based on the error correction code;

determining, by the error detectors, whether the data blocks and parity data block subjected to error correction include an error based on the error detection code;

when a data block subjected to error correction includes an error, restoring the data block including the error based on other data blocks and the parity data block, and synthesizing a restored data block and said other data blocks to generate an encoded data stream by the RAID controller; and

when the data blocks subjected to error correction do not include an error, synthesizing the data blocks subjected to error correction to generate an encoded data stream by the RAID controller.