Semiconductor device and a method of manufacturing the same

• US 8,497,547 B2
• Filed: 08/21/2012
• Issued: 07/30/2013
• Est. Priority Date: 04/04/2006
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Kawashima, Yoshiyuki, Hashimoto, Takashi, Ishii, Yasushi, Nakagawa, Munekatsu, Toba, Koichi, Machida, Satoru
• Primary Examiner(s): Pham, Long
• Application Number:
  US13/591,035
• Publication Number:
  US 20120313160A1
• Time in Patent Office: 343 Days
• Field of Search: 257/324, 257/316, 257/326, 257/E27.103, 257/E29.309
• US Class Current: 257/324
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator
• CPC Class Codes: H01L 29/42324 Gate electrodes for transistors with a floating gate
• CPC Class Codes: H01L 29/42328 with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
• CPC Class Codes: H01L 29/7885 Hot carrier injection from the channel
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

Provided is a semiconductor device having, over a semiconductor substrate, a control gate electrode and a memory gate electrode which are adjacent to each other and constitute a nonvolatile memory. The height of the memory gate electrode is lower than the height of the control gate electrode. A metal silicide film is formed over the upper surface of the control gate electrode, but not formed over the upper surface of the memory gate electrode. The memory gate electrode has, over the upper surface thereof, a sidewall insulating film made of silicon oxide. This sidewall insulating film is formed in the same step as that for the formation of respective sidewall insulating films over the sidewalls of the memory gate electrode and the control gate electrode. The present invention makes it possible to improve the production yield and performance of the semiconductor device having a nonvolatile memory.

Claims

1. A semiconductor device comprising:

a first gate electrode formed of a first conductor film and a second gate electrode formed of a second conductor film, the first and second gate electrodes being formed over a semiconductor substrate and adjacent to each other;

a first gate insulating film formed between the first gate electrode and the semiconductor substrate;

a second gate insulating film formed between the second gate electrode and the semiconductor substrate and between the first gate electrode and the second gate electrode, and having a charge accumulator portion disposed inside of the second gate insulating film;

a resistive element formed in the semiconductor substrate;

first sidewall insulating films formed over side walls of the first and second gate electrodes;

a first insulating film formed over an upper portion of the second gate electrode;

a second insulating film formed over a side wall of the first insulating film; and

a third insulating film formed over the resistive element,

wherein a height of the second gate electrode is lower than a height of the first gate electrode,

wherein the first sidewall insulating films have the same material as that of the first insulating film,

wherein the second insulating film have the same material as that of the third insulating film,

wherein the resistive element has first, second, and third portions,

wherein the first portion and the second portion are exposed from the third insulating film,

wherein the third portion is covered with the third insulating film,

wherein a first metal silicide layer is formed over the first portion and a second metal silicide layer is formed on the second portion,

wherein a third metal silicide film is formed over the first gate electrode, and

wherein a metal silicide film is not formed over the second gate electrode.

2. The semiconductor device according to claim 1, further comprising:

a silicon nitride film formed over the semiconductor substrate to cover the first and second gate electrodes,

wherein the first and second insulating films are formed between the silicon nitride film and the second gate electrode, and

wherein the third insulating film is formed between the silicon nitride film and the resistive element.

3. The semiconductor device according to claim 2, further comprising:

an interlayer insulating film formed over the silicon nitride film; and

a contact hole formed in the interlayer insulating film and the silicon nitride film,

wherein the silicon nitride film functions as an etching stopper film when the contact hole is formed in the interlayer insulating film.

4. The semiconductor device according to claim 1,

wherein the first insulating film and the first sidewall insulating film are formed in the same step, and

wherein the second insulating film and the third insulating film are formed in the same step.

5. The semiconductor device according to claim 1, further comprising:

a first semiconductor region formed in the semiconductor substrate in self alignment with the sidewall of the second gate electrode; and

a second semiconductor region formed in the semiconductor substrate in self alignment with the first sidewall insulating film formed over the sidewall of the second gate electrode.

6. The semiconductor device according to claim 1, further comprising:

a contact portion of the second gate electrode formed of the second conductor film and integral with the second gate electrode;

an interlayer insulating film formed over the semiconductor substrate to cover the first and second gate electrodes and the contact portion;

a first contact hole formed in the interlayer insulating film over the contact portion; and

a conductor portion formed in the first contact hole and electrically coupled to the contact portion,

wherein the contact portion is formed adjacent to the first gate electrode,

wherein the contact portion has a flat portion extending over the semiconductor substrate,

wherein the second gate insulating film is formed between the contact portion and the semiconductor substrate and between the first gate electrode and the contact portion, and

wherein the metal silicide film is formed over an upper surface of the flat portion to be coupled with the conductor portion.

7. The semiconductor device according to claim 1, further comprising a nonvolatile memory,

wherein the first and second gate electrodes are gate electrodes constituting the nonvolatile memory.