Semiconductor device

• US 8,497,557 B2
• Filed: 04/05/2010
• Issued: 07/30/2013
• Est. Priority Date: 04/06/2009
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Fujii, Tetsuo, Yokura, Hisanori, Tanaka, Masaya
• Primary Examiner(s): Nguyen, Ha Tran T
• Assistant Examiner(s): Gupta, Raj R
• Application Number:
  US12/754,036
• Publication Number:
  US 20100252898A1
• Time in Patent Office: 1,212 Days
• Field of Search: 257415-420, 257/619
• US Class Current: 257/415
• CPC Class Codes: B81B 7/0041 maintaining a controlled atmosphere with techniques not provided for in B81B7/0038
• CPC Class Codes: B81C 2203/019 characterised by the material or arrangement of seals between parts
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes a first semiconductor substrate, a second semiconductor substrate, and a sealing member. The first semiconductor substrate has a surface and includes a sensing portion on the surface side. The sensing portion has a movable portion. The first semiconductor substrate and the second semiconductor substrate are bonded together to form a stacked substrate. The stacked substrate defines a hermetically sealed space for accommodating the sensing portion between the first and second semiconductor substrates. The stacked substrate further defines a recess extending between the first semiconductor substrate and the second semiconductor substrate to penetrate an interface between the first semiconductor substrate and the second semiconductor substrate. The sealing member is located in the recess.

Claims

1. A semiconductor device comprising:

a first semiconductor substrate having a surface and including a sensing portion on the surface side, the sensing portion having a movable portion;

a second semiconductor substrate having first and second surfaces opposite to each other,

the first surface of the second semiconductor substrate bonded to the surface of the first semiconductor substrate to form a stacked substrate,

the stacked substrate defining a hermetically sealed space for accommodating the sensing portion between the first and second semiconductor substrates,

the stacked substrate further defining a recess extending between the first and second semiconductor substrates to penetrate an interface between the first and second substrates; and

a sealing member in the recess, wherein

the second semiconductor substrate includes a through electrode extending from the first surface to the second surface of the second semiconductor substrate and electrically connected to the sensing portion of the first semiconductor substrate, and

the recess comprises at least two recess portions,

one recess portion being located closer to a center of the second surface of the second semiconductor substrate than the through electrode, and

the other recess portion being located closer to an outer edge of the second surface of the second semiconductor substrate than the through electrode.