Integrated switch

• US 8,498,291 B2
• Filed: 12/15/2011
• Issued: 07/30/2013
• Est. Priority Date: 08/04/2006
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Tran, Thanh, Chou, Henry, Denton, Scott, Hwang, Andrew
• Primary Examiner(s): Choi, Eunsook
• Application Number:
  US13/327,036
• Publication Number:
  US 20120087249A1
• Time in Patent Office: 593 Days
• Field of Search: None
• US Class Current: 370/359
• CPC Class Codes: H04L 49/352 Gigabit ethernet switching [GBPS]

Abstract

Switching between communication ports of a notebook is typically accomplished using an off-chip local area network (LAN) switch or an off-chip high speed analog multiplexer. This off-chip component is disadvantageous for several reasons, including: added cost of an additional component; increased overall power consumption because transmit amplitude loss; and reduced cable reach and link performance due to hybrid mismatch and signal distortions. To reduce cost and preserve electrical and networking performance, an integrated switch is provided to multiplex signals of a networking communication chip to multiple network paths.

Claims

1. A method of switching data between I/O ports and a gigabit controller having a media access controller (MAC), the method comprising:

executing a first predetermined time delay to de-bounce a connection switch;

after the delay, reading connection status information from a connection sensor, wherein the connection status indicates whether a first or a second I/O port is coupled to an external device;

monitoring an energy level of each I/O port having a connection status of connected;

determining whether each of the monitored I/O ports is active based on the energy level; and

switching data from the MAC to the first I/O port when the first I/O port is active and to the second I/O port when the second I/O port is active while the first I/O port is inactive.

2. The method of claim 1, further comprising:

switching data from the MAC to the second I/O port if one of the following conditions is met,

a) the second I/O port has a connected and active status while the first I/O port has an unconnected status;

or

b) the second I/O port has a connected and active status while the first I/O port has a connected but inactive status.

3. The method of claim 1, further comprising:

powering up an analog front end circuit (AFE) and a digital lock loop (DLL) coupled to the first I/O port when the first I/O port is active; and

delaying the switching data step for a second predetermined amount of time after powering up the AFE and the DLL.

4. The method of claim 3, further comprising:

powering up a second AFE and second DLL coupled to the second I/O port when the second I/O port is active while the first I/O port is inactive; and

delaying the switching data step for the second predetermined amount of time after powering up the second AFE and the second DLL.

5. The method of claim 3, wherein the second predetermined amount of time is approximately 40 micro seconds.

6. The method of claim 3 or 4, further comprising:

powering down the respective AFE and DLL coupled to the first or second I/O port when the first or second I/O port is inactive.

7. The method of claim 1, wherein the first I/O port is coupled to a notebook docking station.

8. The method of claim 1, wherein the second I/O port is coupled to an RJ-45 connector.

9. The method of claim 1, wherein the switching data from the MAC to the first I/O port further comprises:

forwarding data between the MAC and a digital signal processing (DSP) module that is configured to process the data; and

switching the processed data from the DSP module to an analog front end directly coupled to the first I/O port.

10. The method of claim 1, wherein the switching data from the MAC to the second I/O port further comprises:

forwarding data between the MAC and a digital signal processing (DSP) module that is configured to process the data; and

switching the processed data from the DSP module to an analog front end directly coupled to the second. I/O port.

11. The method of claim 1, wherein the switching data from the MAC to the first I/O port further comprises:

switching the data from the MAC to a physical layer device directly coupled to the first I/O port.

12. The method of claim 1, wherein the switching data from the MAC to the second I/O port further comprises:

switching the data from the MAC to a physical layer device directly coupled to the second I/O port.

13. The method of claim 1, wherein the executing the first predetermined time delay comprises:

de-bouncing the connection switch using a software or hardware means.

14. The method of claim 1, further comprising:

powering down predetermined circuits coupled to the first or second I/O port when the first or second I/O port is inactive.

15. The method of claim 1, further comprising delaying the switching data step for a second predetermined amount of time, wherein the second predetermined amount of time is sufficient to allow predetermined circuits to power up and stabilize.

16. A system comprising:

a first communication port and a second communication port;

a media access controller (MAC);

a switch assembly having a first switch coupled to the first communication port and a second switch coupled to the second communication port;

a switch controller configured to execute a first predetermined time delay to de-bounce a connection switch; and

a sensor configured to, after the delay, read connection status information to determine whether the first or second communication port is coupled to an external device, monitor an energy level of each communication port having a connection status of connected, determine whether each of the monitored communication ports is active based on the energy level, and switch data from the MAC to the first communication port when the first communication port is active and to the second communication port when the second communication port is active.

17. The system of claim 16, further comprising:

a digital signal processing module configured to receive an information signal from the MAC and to output a processed signal;

wherein the switch controller is configured to delay the first or second switch for a second predetermined amount of time after the first or second switch is enabled and prior to receiving the processed signal from the digital signal processing module.

18. The system of claim 16, wherein the first communication port is coupled to a notebook docking station.

19. The system of claim 16, wherein the switch assembly is a digital multiplexer.