Semiconductor device and manufacturing method thereof

• US 8,501,555 B2
• Filed: 09/10/2009
• Issued: 08/06/2013
• Est. Priority Date: 09/12/2008
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Akimoto, Kengo, Komori, Shigeki, Uochi, Hideki
• Primary Examiner(s): WHALEN, DANIEL B
• Application Number:
  US12/556,590
• Publication Number:
  US 20100065842A1
• Time in Patent Office: 1,426 Days
• Field of Search: 438/161
• US Class Current: 438/161
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

It is an object of the present invention to provide a thin film transistor in which an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn) is used and contact resistance of a source or a drain electrode layer is reduced, and a manufacturing method thereof. An IGZO layer is provided over the source electrode layer and the drain electrode layer, and source and drain regions having lower oxygen concentration than the IGZO semiconductor layer are intentionally provided between the source and drain electrode layers and the gate insulating layer, so that ohmic contact is made.

Claims

1. A method for manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over an insulating surface;

forming a gate insulating layer over the gate electrode;

forming a source region, a drain region, a first metal layer over the source region and a second metal layer over the drain region;

subjecting a top surface of the gate insulating layer which is exposed, a top surface of the first metal layer, and a top surface of the second metal layer, to a plasma treatment; and

forming a non-single-crystal oxide semiconductor layer over the gate insulating layer without exposure to air after the subjecting the gate insulating layer to the plasma treatment,

wherein the non-single-crystal oxide semiconductor layer overlaps with the gate electrode, and

wherein an oxygen concentration in the source region and the drain region is lower than an oxygen concentration in the non-single-crystal oxide semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1, wherein each of the non-single-crystal oxide semiconductor layer, and the source region and the drain region is formed using an oxide layer including indium, gallium, and zinc by a sputtering method.

3. The method for manufacturing a semiconductor device according to claim 1, wherein the source region and the drain region are etched in a self-aligned manner with the first metal layer and the second metal layer used as a mask.

4. The method for manufacturing a semiconductor device according to claim 1, wherein an argon gas and an oxygen gas are used for the plasma treatment.

5. The method for manufacturing a semiconductor device according to claim 1, wherein the first metal layer and the second metal layer are made from an element selected from Al, Cr, Ta, Ti, Mo, and W or an alloy containing any of the elements as its component, or an alloy containing any of the elements in combination.

6. A method for manufacturing a semiconductor device comprising the steps of:

forming a conductive layer over an insulating surface;

etching the conductive layer to remove a part of the conductive layer;

forming an insulating layer over the etched conductive layer;

forming a first oxide semiconductor layer over the insulating layer;

forming a metal layer over the first oxide semiconductor layer;

etching the metal layer to remove a part of the metal layer;

etching the first oxide semiconductor layer to remove a part of the first oxide semiconductor layer;

subjecting a top surface of the insulating layer which is exposed and a top surface of the etched metal layer, to a plasma treatment; and

forming a second oxide semiconductor layer over the insulating layer and the etched metal layer,

wherein the second oxide semiconductor layer overlaps with the etched conductive layer, and

wherein an oxygen concentration in the first oxide semiconductor layer is lower than an oxygen concentration in the second oxide semiconductor layer.

7. The method for manufacturing a semiconductor device according to claim 6, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer is formed using an oxide layer including indium, gallium, and zinc by a sputtering method.

8. The method for manufacturing a semiconductor device according to claim 6, wherein the first oxide semiconductor layer is etched in a self-aligned manner with the etched metal layer used as a mask.

9. The method for manufacturing a semiconductor device according to claim 6, wherein an argon gas and an oxygen gas are used for the plasma treatment.

10. The method for manufacturing a semiconductor device according to claim 6, wherein the metal layer is made from an element selected from Al, Cr, Ta, Ti, Mo, and W or an alloy containing any of the elements as its component, or an alloy containing any of the elements in combination.

11. A method for manufacturing a semiconductor device comprising the steps of:

forming a conductive layer over an insulating surface;

etching the conductive layer to remove a part of the conductive layer;

forming an insulating layer over the etched conductive layer;

forming a first oxide semiconductor layer over the insulating layer;

forming a metal layer over the first oxide semiconductor layer;

etching the metal layer to remove a part of the metal layer;

etching the first oxide semiconductor layer to remove a part of the first oxide semiconductor layer;

subjecting a top surface of the insulating layer which is exposed and a top surface of the etched metal layer, to a plasma treatment by performing the plasma treatment using at least an oxygen gas; and

forming a second oxide semiconductor layer over the insulating layer and the etched metal layer,

wherein the second oxide semiconductor layer overlaps with the etched conductive layer.

12. The method for manufacturing a semiconductor device according to claim 11, wherein each of the first oxide semiconductor layer and the second oxide semiconductor layer is formed using an oxide layer including indium, gallium, and zinc by a sputtering method.

13. The method for manufacturing a semiconductor device according to claim 11, wherein the first oxide semiconductor layer is etched in a self-aligned manner with the etched metal layer used as a mask.

14. The method for manufacturing a semiconductor device according to claim 11, wherein the metal layer is made from an element selected from Al, Cr, Ta, Ti, Mo, and W or an alloy containing any of the elements as its component, or an alloy containing any of the elements in combination.