Method for generating a three-dimensional NAND memory with mono-crystalline channels using sacrificial material
First Claim
1. A method for generating a three-dimensional (3D) non-volatile memory (NVM) array comprising:
- forming a plurality of parallel horizontally-disposed mono-crystalline silicon beams that are arranged in a vertical stack such that an associated air gap is defined between each adjacent pair of beams in the stack;
forming a charge storage layer on each of the mono-crystalline silicon beams such that each said charge storage layer includes a oxide layer that entirely covers an associated said beam, and forming a plurality of parallel, spaced-apart vertically-disposed wordline structures next to the stack such that each said wordline structure contacts substantially only a vertical side portion of each of said charge storage layers disposed on said plurality of beams in the stack.
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Abstract
A method for generating three-dimensional (3D) non-volatile memory (NVM) arrays includes forming multiple parallel horizontally-disposed mono-crystalline silicon beams that are spaced apart and arranged in a vertical stack (e.g., such that an elongated horizontal air gap is defined between each adjacent beam in the stack), forming separate charge storage layers on each of the mono-crystalline silicon beams such that each charge storage layer includes a high-quality thermal oxide layer that entirely covers (i.e., is formed on the upper, lower and opposing side surfaces of) each of the mono-crystalline silicon beams, and then forming multiple vertically-disposed poly-crystalline silicon wordline structures next to the stack such that each wordline structure is connected to each of the bitline structures in the stack by way of corresponding portions of the separate charge storage layers. The memory cells are accessed during read/write operations by way of the corresponding wordline and bitline structures.
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Citations
20 Claims
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1. A method for generating a three-dimensional (3D) non-volatile memory (NVM) array comprising:
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forming a plurality of parallel horizontally-disposed mono-crystalline silicon beams that are arranged in a vertical stack such that an associated air gap is defined between each adjacent pair of beams in the stack; forming a charge storage layer on each of the mono-crystalline silicon beams such that each said charge storage layer includes a oxide layer that entirely covers an associated said beam, and forming a plurality of parallel, spaced-apart vertically-disposed wordline structures next to the stack such that each said wordline structure contacts substantially only a vertical side portion of each of said charge storage layers disposed on said plurality of beams in the stack. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 15, 16, 17, 18)
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10. A method for generating a three-dimensional (3D) non-volatile memory (NVM) array comprising:
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forming a plurality of spaced-apart, parallel, horizontally-disposed mono-crystalline silicon beams that are arranged in a plurality of vertical stacks such that a trench is defined between each adjacent pair of stacks of said mono-crystalline silicon beams; forming a plurality of charge storage layers, each said charge storage layer being disposed on an associated said mono-crystalline silicon beams such that each said charge storage layer includes a first oxide layer that entirely covers an associated one of the mono-crystalline silicon beams, and forming a plurality of parallel, spaced-apart vertically-disposed wordline structures next to each stack such that each said wordline structure contacts a corresponding portion of said charge storage layers formed on each of the plurality of beams in at least one associated stack of said plurality of stacks, wherein the corresponding portions are disposed on a vertical side edge of each beam in the at least one associated stack. - View Dependent Claims (20)
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19. A method for generating a three-dimensional (3D) non-volatile memory (NVM) array comprising:
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forming a plurality of parallel horizontally-disposed mono-crystalline silicon beams that are spaced apart and arranged in a vertical stack; forming a charge storage layer on each of the mono-crystalline silicon beams such that horizontal portions of the charge storage layers disposed on opposing surfaces of each adjacent pair of mono-crystalline silicon beams are separated by an air gap; and forming a plurality of parallel, spaced-apart vertically-disposed wordline structures next to the stack such that each said wordline structure is connected to each of the plurality of mono-crystalline silicon beams in the stack by way of corresponding vertical portions of each said charge storage layer, wherein the corresponding vertical portions are disposed on side edges of the bitline structures and form memory devices.
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Specification