LED with uniform current spreading and method of fabrication

• US 8,502,192 B2
• Filed: 01/10/2011
• Issued: 08/06/2013
• Est. Priority Date: 01/12/2010
• Status: Expired due to Fees

• Current Assignee: Varian Semiconductor Equipment Associates Incorporated (Applied Materials Incorporated)
• Original Assignee: Varian Semiconductor Equipment Associates Incorporated (Applied Materials Incorporated)
• Inventors: Kwak, Joon Seop, Park, Min Joo, Khaja, Fareen Adeni, Chen, Chi-Chun
• Primary Examiner(s): Coleman, William D
• Assistant Examiner(s): Anya, Igwe U
• Application Number:
  US12/987,655
• Publication Number:
  US 20110168972A1
• Time in Patent Office: 939 Days
• Field of Search: 257/13, 438/478
• US Class Current: 257/13
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor

Abstract

A lateral light emitting diode comprises a layer stack disposed on one side of a substrate, the layer stack including a p-type layer, n-type layer, and a p/n junction formed therebetween. The LED may further include a p-electrode disposed on a first side of the substrate and being in contact with the p-type layer on an exposed surface and an n-electrode disposed on the first side of the substrate and being in contact with an exposed surface of an n⁺ sub-layer of the n-type layer.

Claims

1. A lateral light emitting diode (LED), comprising:

a layer stack disposed on one side of a substrate, the layer stack including a p-type layer, n-type layer, and a p/n junction formed therebetween;

a p-electrode disposed on a first side of the substrate and being in contact with the p-type layer on an exposed surface; and

an n-electrode disposed on the first side of the substrate and being in contact with an exposed surface of an n⁺ sub-layer of the n-type layer, wherein the n⁺ sub-layer is formed in both a wall of the layer stack and the exposed surface of the n⁺ sub-layer.

2. The lateral LED of claim 1, wherein the p-type and n-type layers comprise GaN.

3. The lateral LED of claim 1, the n⁺ sub-layer comprising a mesa structure disposed in an outer region of an exposed portion of the n-type layer.

4. The lateral LED of claim 1, further comprising a quantum well structure disposed between the n-type and p-type layers.

5. The lateral LED of claim 1, the n⁺ sub-layer being formed by implantation of first ions in an outer region of the n-type layer.

6. The lateral LED of claim 5, wherein an ion dose of the first ions in the n⁺ sub-layer is about 1E13 to 1E16/cm².

7. The lateral LED of claim 5, the first ions comprising Si-containing species.

8. The lateral LED of claim 5, the n⁺ sub-layer comprising a roughened top surface.

9. A method of forming a light emitting diode, comprising:

etching a portion of a layer stack comprising an n-type layer disposed facing a substrate, an outer p-type layer, and a p/n junction formed therebetween, so as to expose a portion of the n-type layer; and

implanting ions into an outer region of the exposed portion of the n-type layer so as to form an n⁺ outer layer, wherein the ions are implanted at a non-zero angle with respect to a surface of the outer region.

10. The method of claim 9, further comprising forming an n-electrode on the n⁺ outer layer.

11. The method of claim 9, the n-type layer and p-type layer each comprising GaN.

12. The method of claim 9, wherein the layer stack comprises a quantum well structure disposed between the n-type and p-type layers.

13. The method of claim 9, wherein the ions are implanted to a depth of about 1-20 nm.

14. The method of claim 9, the ions comprising one of group IV and group VI elements.

15. The method of claim 9, wherein an ion energy of the ions is about 100 eV to 50 keV and wherein an ion dose of the ions is about 1E13 to about 1E16/cm².

16. The method of claim 9, further comprising roughening an outer surface of the exposed portion of the n-type layer during the implanting.

17. The method of claim 9, further comprising implanting the ions into the outer region of the exposed portion of the n-type layer so as to form the n⁻

outer layer, wherein the ions are implanted at a perpendicular angle with respect to the surface of the outer region.

18. The method of claim 9, further comprising annealing the n-type layer after the implanting.

19. The method of claim 18, wherein the annealing comprises laser annealing.

20. The method of claim 19, wherein the annealing comprises a combination of laser annealing and rapid thermal annealing.