Semiconductor device with improved on-resistance

• US 8,502,315 B2
• Filed: 05/03/2012
• Issued: 08/06/2013
• Est. Priority Date: 12/09/2009
• Status: Expired due to Fees

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Mauder, Anton, Berger, Rudolf, Hirler, Franz, Siemieniec, Ralf, Schulze, Hans-Joachim
• Primary Examiner(s): Lee, Eugene
• Application Number:
  US13/463,243
• Publication Number:
  US 20120217580A1
• Time in Patent Office: 460 Days
• Field of Search: 257/341, 257/401, 257/E29.257
• US Class Current: 257/341
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/408 with an insulating layer with a particular dielectric or electrostatic property, e.g. with static charges or for controlling trapped charges or moving ions, or with a plate acting on the insulator potential or the insulator charges, e.g. for controlling charges effect or potential distribution in the insulating layer, or with a semi-insulating layer contacting directly the semiconductor surface
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66719 With a step of forming an insulating sidewall spacer
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor device includes a source, a drain, and a gate configured to selectively enable a current to pass between the source and the drain. The semiconductor device includes a drift zone between the source and the drain and a first field plate adjacent the drift zone. The semiconductor device includes a dielectric layer electrically isolating the first field plate from the drift zone and charges within the dielectric layer close to an interface of the dielectric layer adjacent the drift zone.

Claims

1. A semiconductor device comprising:

a source;

a drain;

a gate configured to selectively enable a current to pass between the source and the drain;

a drift zone between the source and the drain;

a body region between the drift zone and the source;

a first dielectric layer electrically isolating the gate from the body region;

a first field plate adjacent the drift zone;

a second dielectric layer electrically isolating the first field plate from the drift zone;

charges within the second dielectric layer close to an interface of the second dielectric layer adjacent the drift zone; and

at least a second field plate below the first field plate,

wherein the charges are not within the first dielectric layer.

2. The semiconductor device of claim 1, wherein a width of the second field plate is less than a width of the first field plate.

3. A semiconductor device comprising:

a source;

a drain;

a gate configured to selectively enable a current to pass between the source and the drain;

a drift zone between the source and the drain;

a dielectric layer extending through at least a portion of the drift zone;

positive charges within the dielectric layer at a first interface of the dielectric layer adjacent the drift zone; and

;

negative charges within the dielectric layer at a second interface of the dielectric layer opposite the first interface.

4. The semiconductor device of claim 3, further comprising:

a first field plate electrically isolated from the drift zone by the dielectric layer.

5. The semiconductor device of claim 4, further comprising:

at least a second field plate electrically isolated from the drift zone by the dielectric layer, the second field plate below the first field plate.

6. The semiconductor device of claim 4, wherein the second interface of the dielectric layer contacts the first field plate.

7. The semiconductor device of claim 3, wherein the positive charges are provided by cesium, and

wherein the negative charges are provided by Al.