Monolithic IGBT and diode structure for quasi-resonant converters

• US 8,502,346 B2
• Filed: 12/23/2010
• Issued: 08/06/2013
• Est. Priority Date: 12/23/2010
• Status: Active Grant

• Current Assignee: Alpha & Omega Semiconductor, Ltd.
• Original Assignee: Alpha & Omega Semiconductor, Ltd.
• Inventors: Bhalla, Anup
• Primary Examiner(s): Lee, Eugene
• Application Number:
  US12/928,988
• Publication Number:
  US 20120161286A1
• Time in Patent Office: 957 Days
• Field of Search: 257/577, 257/559
• US Class Current: 257/577
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05553 being rectangular
• CPC Class Codes: H01L 2224/0557 the external layer being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/06051 Bonding areas having different shapes
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 27/0647 Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/12032 Schottky diode
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/30107 : Inductance

Abstract

This invention discloses a semiconductor power device formed in a semiconductor substrate. The semiconductor power device further includes a channel stop region near a peripheral of the semiconductor substrate wherein the channel stop region further includes a peripheral terminal of a diode corresponding with another terminal of the diode laterally opposite from the peripheral terminal disposed on an active area of the semiconductor power device. In an embodiment of this invention, the semiconductor power device is an insulated gate bipolar transistor (IGBT).

Claims

1. A semiconductor device disposed on a semiconductor substrate having an active cell area and a termination area laterally away from the active cell area comprising:

a vertical semiconductor device having a metal-oxide-semiconductor (MOS) gate structure in the active area with a collector electrode on a bottom surface and an anode/emitter metal electrode disposed on a top surface of the semiconductor substrate;

the semiconductor substrate further having an epitaxial layer of a first conductivity type supporting the MOS gate near the top surface including a first dopant region of a second conductivity type electrically contacting the anode/emitter metal electrode disposed on the top surface; and

a cathode metal electrode disposed on the top surface in the termination area above a second dopant region of the first conductivity type electrically contacting the epitaxial layer wherein the first dopant region in the active cell area interfacing with the epitaxial layer and the epitaxial layer interfacing with the second dopant region in the termination area constituting a lateral PiN diode with the epitaxial layer of the first conductivity functioning as an intrinsic layer of the PiN diode.

2. The semiconductor device of claim 1:

the second dopant region of the first conductivity type constituting a channel stop region in the termination area of the semiconductor device near the periphery of the semiconductor substrate.

3. The semiconductor device of claim 1 wherein:

the vertical semiconductor power device comprises a vertical insulated gate bipolar transistor (IGBT) integrated with the lateral PiN diode.

4. The semiconductor device of claim 1 further comprising:

a guard ring dopant region of the second conductivity type disposed in the termination area near the top surface functioning as an electric field spreading termination structure between the MOS gate and the second dopant region under the cathode metal electrode of lateral PiN the diode.

5. The semiconductor device of claim 1 wherein:

the cathode metal electrode in the termination area further comprises a first metal plate disposed on the top surface covering a first conductive plug filling in a peripheral contact trench near a periphery of the semiconductor substrate.

6. The semiconductor device of claim 1 wherein:

the anode/emitter metal electrode in the active cell area further comprises a second metal plate disposed on the top surface covering a second conductive plug filling in a central contact trench disposed in the active cell area of the semiconductor substrate.

7. The semiconductor device of claim 1 wherein:

the semiconductor device comprises a vertical insulated gate bipolar transistor (IGBT) having an insulated trench gate.

8. The semiconductor device of claim 7 wherein:

said vertical IGBT is formed in the epitaxial layer of an N-type conductivity type and the first dopant is a P-type dopant region and the second dopant region is an N type dopant region to form the lateral PiN diode.

9. The semiconductor device of claim 7 further comprising:

the cathode metal electrode in the termination area further comprises a first metal plate disposed on the top surface covering a first conductive plug filling in a peripheral contact trench near a periphery of the semiconductor substrate.

10. The semiconductor device of claim 7 further comprising:

the anode/emitter metal electrode in the active cell area further comprises a second metal plate disposed on the top surface covering a second conductive plug filling in a central contact trench disposed in the active cell area of the semiconductor substrate.

11. The semiconductor device of claim 7 wherein:

the second dopant region of the first conductivity type constituting a channel stop region in the termination area of the IGBT near the periphery of the semiconductor substrate.

12. The semiconductor device of claim 7 wherein:

the vertical IGBT is formed in the epitaxial layer of an N-type conductivity type and further comprising a P-type body region encompassing an N-type source regions electrically connected to the anode/emitter metal electrode.

13. The semiconductor device of claim 7 further comprising:

the vertical IGBT is formed in the epitaxial layer of an N-type conductivity type and the collector terminal disposed on the bottom surface of the semiconductor substrate further comprising a P-dopant bottom layer.

14. The semiconductor device of claim 7 further comprising:

a guard ring dopant region of a P-type conductivity type disposed in the termination area near the top surface functioning as an electric field spreading termination structure between the IGBT and the second dopant region under the cathode metal electrode of lateral PiN the diode.