Nonplanar device with thinned lower body portion and method of fabrication
First Claim
1. A semiconductor device comprising:
- a semiconductor body formed on an insulating layer of a substrate, the semiconductor body having;
a bottom surface formed directly on the insulating layer;
a top surface opposite the bottom surface;
a pair of laterally opposite sidewalls extending between the top surface and the bottom surface;
an upper body portion adjacent the top surface in which the laterally opposite sidewalls are substantially vertical, anda lower body portion extending from the upper body portion to the bottom surface in which the laterally opposite sidewalls continually taper inward from the upper body portion to the bottom surface such that the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface;
a gate dielectric layer formed on and in direct contact with the top surface and the sidewalls of the semiconductor body from the top surface to the bottom surface;
a gate electrode formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body; and
a pair of source/drain region formed in the semiconductor body on opposite sides of the gate electrode.
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Abstract
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface. A gate dielectric layer is formed on the top surface of the semiconductor body and on the sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.
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Citations
11 Claims
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1. A semiconductor device comprising:
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a semiconductor body formed on an insulating layer of a substrate, the semiconductor body having; a bottom surface formed directly on the insulating layer; a top surface opposite the bottom surface; a pair of laterally opposite sidewalls extending between the top surface and the bottom surface; an upper body portion adjacent the top surface in which the laterally opposite sidewalls are substantially vertical, and a lower body portion extending from the upper body portion to the bottom surface in which the laterally opposite sidewalls continually taper inward from the upper body portion to the bottom surface such that the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface; a gate dielectric layer formed on and in direct contact with the top surface and the sidewalls of the semiconductor body from the top surface to the bottom surface; a gate electrode formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body; and a pair of source/drain region formed in the semiconductor body on opposite sides of the gate electrode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification