Analog-to-digital converter and analog-to-digital conversion method

• US 8,502,718 B2
• Filed: 01/31/2011
• Issued: 08/06/2013
• Est. Priority Date: 11/19/2010
• Status: Active Grant

• Current Assignee: Fortemedia, Inc.
• Original Assignee: Fortemedia, Inc.
• Inventors: Chiu, Jui-Te, Lin, Ching-Tzung
• Primary Examiner(s): Nguyen, Khai M
• Application Number:
  US13/017,548
• Publication Number:
  US 20120128182A1
• Time in Patent Office: 918 Days
• Field of Search: 341/143, 341/155, 381/120, 381/122
• US Class Current: 341/143
• CPC Class Codes: G10L 19/04 using predictive techniques
• CPC Class Codes: G10L 19/18 Vocoders using multiple modes
• CPC Class Codes: H03M 3/43 the quantiser being a single bit one
• CPC Class Codes: H04R 2410/00 Microphones
• CPC Class Codes: H04R 3/00 Circuits for transducers , loudspeakers or microphones

Abstract

The invention provides an analog-to-digital converter. In one embodiment, the analog-to-digital converter receives a first audio signal from a microphone sensor, and receives a first channel selection signal and a clock signal, and comprises a toggle detection module, a first data processing module, a second data processing module, and a multiplexer. The toggle detection module detects whether the first channel selection signal is toggling between a logic low level and a logic high level to generate a control signal. The first data processing module processes the first channel selection signal to generate a second channel selection signal. The second data processing module converts the first audio signal from analog to digital to generate a second audio signal. If the control signal indicates that the first channel selection signal is toggling between the logic low level and the logic high level, the multiplexer outputs data bits of the second channel selection signal as an output signal of the analog-to-digital converter when the clock signal oscillates to the logic high level, and outputs data bits of the second audio signal as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic low level.

Claims

1. An analog-to-digital converter, receiving a first audio signal from a microphone sensor, and receiving a first channel selection signal and a clock signal, comprising:

a toggle detection module, detecting whether the first channel selection signal is toggling between a logic low level and a logic high level to generate a control signal;

a first data processing module, processing the first channel selection signal to generate a second channel selection signal;

a second data processing module, converting the first audio signal from analog to digital to generate a second audio signal; and

a multiplexer, if the control signal indicates that the first channel selection signal is toggling between the logic low level and the logic high level, outputting data bits of the second channel selection signal as an output signal of the analog-to-digital converter when the clock signal oscillates to the logic low level, and outputting data bits of the second audio signal as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic high level.

2. The analog-to-digital converter as claimed in claim 1, wherein the second data processing module comprises:

a pre-amplifier, amplifying the first audio signal to obtain a third audio signal;

a 1-bit Δ

Σ

modulator, converting the third audio signal from analog to digital to obtain a fourth audio signal; and

a signal coding module, encoding the second audio signal according to the fourth audio signal when the control signal indicates that the first channel selection signal is toggling, and bypassing the fourth audio signal as the second audio signal when the control signal indicates that the first channel selection signal is not toggling.

3. The analog-to-digital converter as claimed in claim 1, wherein if the control signal indicates that the first channel selection signal stays at the logic low level, the multiplexer outputs the data bits of the second audio signal as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic low level, and the output terminal of the analog-to-digital converter is switched to a high-impedance state when the clock signal oscillates to the logic high level.

4. The analog-to-digital converter as claimed in claim 1, wherein if the control signal indicates that the first channel selection signal is remaining at the logic high level, the multiplexer outputs the data bits of the second audio signal as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic high level, and the output terminal of the analog-to-digital converter is switched to a high-impedance state when the clock signal oscillates to the logic low level.

5. The analog-to-digital converter as claimed in claim 1, wherein the output signal of the analog-to-digital converter is fed back as the first channel selection signal.

6. The analog-to-digital converter as claimed in claim 1, wherein the first data processing module inverts the values of the data bits of the first channel selection signal to obtain the data bits of the second channel selection signal.

7. The analog-to-digital converter as claimed in claim 2, wherein the signal coding module adds a DC offset value to the fourth audio signal to obtain the second audio signal.

8. The analog-to-digital converter as claimed in claim 2, wherein the signal coding module multiplies the fourth audio signal by a multiplier value to obtain the second audio signal.

9. The analog-to-digital converter as claimed in claim 2, wherein the signal coding module delays the fourth audio signal by a delay period to obtain the second audio signal.

10. An analog-to-digital conversion method, wherein an analog-to-digital converter comprises a toggle detection module, a first data processing module, a second data processing module, and a multiplexer, comprising:

receiving a first audio signal from a microphone sensor;

receiving a first channel selection signal and a clock signal;

detecting whether the first channel selection signal is toggling between a logic low level and a logic high level with a toggle detection module to generate a control signal;

processing the first channel selection signal with the first data processing module to generate a second channel selection signal;

converting the first audio signal from analog to digital with the second data processing module to generate a second audio signal; and

if the control signal indicates that the first channel selection signal is toggling between the logic low level and the logic high level, outputting data bits of the second channel selection signal with the multiplexer as an output signal of the analog-to-digital converter when the clock signal oscillates to the logic low level, and outputting data bits of the second audio signal with the multiplexer as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic high level.

11. The analog-to-digital conversion method as claimed in claim 10, wherein the second data processing module comprises a pre-amplifier, a 1-bit Δ

Σ

modulator, and a signal coding module, and processing of the first audio signal comprises;

amplifying the first audio signal with the pre-amplifier to obtain a third audio signal;

converting the third audio signal from analog to digital with the 1-bit Δ

Σ

modulator to obtain a fourth audio signal; and

encoding the second audio signal with the signal coding module according to the fourth audio signal.

12. The analog-to-digital conversion method as claimed in claim 10, wherein the method further comprises:

if the control signal indicates that the first channel selection signal stays at the logic low level, outputting the data bits of the second audio signal with the multiplexer as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic low level, and switching the output terminal of the analog-to-digital converter to a high-impedance state when the clock signal oscillates to the logic high level.

13. The analog-to-digital conversion method as claimed in claim 10, wherein the method further comprises:

if the control signal indicates that the first channel selection signal is remaining at the logic high level, outputting the data bits of the second audio signal with the multiplexer as the output signal of the analog-to-digital converter when the clock signal oscillates to the logic high level, and switching the output terminal of the analog-to-digital converter to a high-impedance state when the clock signal oscillates to the logic low level.

14. The analog-to-digital conversion method as claimed in claim 10, wherein the method further comprises:

feeding the output signal of the analog-to-digital converter back to the input of the analog-to-digital converter as the first channel selection signal.

15. The analog-to-digital conversion method as claimed in claim 10, wherein processing of the first channel selection signal comprises:

inverting the data bits of the first channel selection signal with the first data processing module to obtain the data bits of the second channel selection signal.

16. The analog-to-digital conversion method as claimed in claim 11, wherein encoding of the second audio signal comprises:

adding a DC offset value to the fourth audio signal with the signal coding module to obtain the second audio signal.

17. The analog-to-digital conversion method as claimed in claim 11, wherein encoding of the second audio signal comprises:

multiplying the fourth audio signal by a multiplier value with the signal coding module to obtain the second audio signal.

18. The analog-to-digital conversion method as claimed in claim 11, wherein encoding of the second audio signal comprises:

delaying the fourth audio signal by a delay period with the signal coding module to obtain the second audio signal.