Receiver, receiving method, program and receiving system
First Claim
1. A receiver comprising:
- receiving circuitry configured to receive an Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams;
first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain;
second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and
switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.
2 Assignments
0 Petitions
Accused Products
Abstract
A receiver that receives an Orthogonal Frequency Division Multiplexing (OFDM) signal obtained by modulating a common packet sequence and data packet sequence. The common packet sequence is made up of packets common to a plurality of streams. The data packet sequence is made up of packets specific to one of the plurality of streams. The receiver sorts the common packet sequence, obtained by demodulating the received OFDM signal, in the time domain, and sorts the data packet sequence, obtained by demodulating the received OFDM signal, in the time domain. The receiver then switches the output for error correction from the one sorting over to the other sorting if, while the one sorting supplies its output to the error correction, the other sorting completes its input of a predetermined unit of information to be processed.
12 Citations
15 Claims
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1. A receiver comprising:
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receiving circuitry configured to receive an Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A receiving method for a receiver, the receiver having receiving circuitry, first and second sorting circuitry and switching circuitry, the receiving method comprising the steps of:
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receiving, by the receiving circuitry, an Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; sorting, by the first sorting circuitry, the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; sorting, by the second sorting circuitry, the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching, by the switching circuitry, an output to error correction circuitry for handling error correction from one sorting circuitry over to the other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.
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10. A non-transitory computer readable medium including a program, which when executed by a computer, causes the computer to:
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receive an Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switch an output to error correction from one sorting over to other sorting if, while the one sorting supplies its output to the error correction, the other sorting completes its input of a predetermined unit of information to be processed.
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11. A receiving system comprising:
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a communication interface configured to receive Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence via a transmission line, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; and transmission line decoding circuitry configured to subject the Orthogonal Frequency Division Multiplexing signal obtained via the transmission line to transmission line decoding including at least packet sequence decoding, wherein the transmission line decoding circuitry includes; first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.
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12. A receiving system comprising:
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transmission line decoding circuitry configured to subject an Orthogonal Frequency Division Multiplexing signal, obtained via a transmission line by modulating a common packet sequence and data packet sequence, to transmission line decoding including at least packet sequence decoding, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; and source decoding circuitry configured to subject the Orthogonal Frequency Division Multiplexing signal that has undergone the transmission line decoding to source decoding including at least decompression of information based on compressed information, wherein the transmission line decoding circuitry includes; first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.
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13. A receiving system comprising:
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transmission line decoding circuitry configured to subject an Orthogonal Frequency Division Multiplexing signal, obtained via a transmission line by modulating a common packet sequence and data packet sequence, to transmission line decoding including at least packet sequence decoding, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; and output circuitry configured to output an image or sound based on the Orthogonal Frequency Division Multiplexing signal that has undergone the transmission line decoding, wherein the transmission line decoding circuitry includes; first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.
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14. A receiving system comprising:
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transmission line decoding circuitry configured to subject an Orthogonal Frequency Division Multiplexing signal, obtained via a transmission line by modulating a common packet sequence and data packet sequence, to transmission line decoding including at least packet sequence decoding, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; and recording circuitry configured to record the Orthogonal Frequency Division Multiplexing signal that has undergone the transmission line decoding, wherein the transmission line decoding circuitry includes; first sorting circuitry configured to sort the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second sorting circuitry configured to sort the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and switching circuitry configured to switch an output to error correction circuitry for handling error correction from one sorting circuitry over to other sorting circuitry if, while the one sorting circuitry supplies its output to the error correction circuitry, the other sorting circuitry completes its input of a predetermined unit of information to be processed.
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15. A receiver comprising:
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means for receiving an Orthogonal Frequency Division Multiplexing signal obtained by modulating a common packet sequence and data packet sequence, the common packet sequence being made up of packets common to a plurality of streams, and the data packet sequence being made up of packets specific to one of the plurality of streams; first means for sorting the common packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; second means for sorting the data packet sequence, obtained by demodulating the received Orthogonal Frequency Division Multiplexing signal, in the time domain; and means for switching an output to an error correction means for handling error correction from one sorting means over to other sorting means if, while the one sorting means supplies its output to the error correction means, the other sorting means completes its input of a predetermined unit of information to be processed.
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Specification