Virtual machine control device, virtual machine control program, and virtual machine control circuit for managing interrupts of plural virtual machines

• US 8,504,752 B2
• Filed: 06/23/2009
• Issued: 08/06/2013
• Est. Priority Date: 06/24/2008
• Status: Expired due to Fees

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Tanikawa, Tadao, Amano, Katsushige, Arinobu, Katsuhiro
• Primary Examiner(s): Patel, Nimesh G
• Application Number:
  US12/997,704
• Publication Number:
  US 20110106993A1
• Time in Patent Office: 1,505 Days
• Field of Search: 710260-269, 718/108
• US Class Current: 710/262
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked

Abstract

The interrupt level storing unit (16) stores one or more interrupt levels indicating the priority of a generated interrupt and stores the interrupt level having the highest priority among the stored interrupt levels as a second interrupt mask level. The second interrupt type determination unit (13) sets an interrupt level corresponding to the interrupt type of a newly generated interrupt. The priority determination unit (14) notifies the interrupt to the virtual machine control unit (20) when the interrupt level of the newly generated interrupt is higher than the stored second interrupt mask level. As a result, the priority of the virtual machine can be determined according to the task priority and the switching of virtual machines can be adequately controlled even if the virtual machines cannot notify the task priority.

Claims

1. A virtual machine control device comprising:

a virtual machine control unit that controls switching of a plurality of virtual machines operating on a CPU;

a plurality of interrupt controllers that output an interrupt request notifying a generation of an interrupt as one virtual machine from among the plurality of virtual machines performs processing;

an interrupt control unit that receives the interrupt request from the plurality of interrupt controllers and controls notification of the interrupt to the virtual machine control unit on the basis of an interrupt level indicating a priority of the generated interrupt; and

an idle detection unit that detects that the CPU has executed a command for implementing a transition to an idle state and outputs the interrupt request to the interrupt control unit, wherein

the virtual machine control unit includes;

a first interrupt type determination unit that determines a type of the interrupt notified from the interrupt control unit;

an interrupt return destination storing unit that stores a program counter value immediately preceding the interrupt generation when the generated interrupt is determined to be an interrupt relating to a presently active virtual machine on the basis of the interrupt type determined by the first interrupt type determination unit;

an interrupt mask level setting table that stores in advance as a first interrupt mask level a priority of an interrupt processing executed in each virtual machine and a priority of a task processing executed in each virtual machine;

a first interrupt mask level setting unit that notifies to the interrupt control unit the first interrupt mask level corresponding to a next processing to be executed by the virtual machine from among the interrupt mask levels in the interrupt mask level setting table when the interrupt processing by the virtual machine has ended, and

an update unit that requests the interrupt control unit to update an interrupt level in the interrupt control unit to the newest state, and

the interrupt control unit includes;

an interrupt level storing unit that stores one or more interrupt levels indicating the priority of the generated interrupt and stores as a second interrupt mask level the interrupt level having the highest priority among the stored interrupt levels;

a second interrupt mask level setting unit that sets in the interrupt level storing unit as an interrupt level the first interrupt mask level notified by the first interrupt mask level setting unit;

an interrupt level setting unit that takes information indicating from where the interrupt request has been notified as an interrupt type and stores an interrupt level corresponding to each interrupt type;

a second interrupt type determination unit that receives a newly generated interrupt request, determines from where, among the plurality of interrupt controllers and the idle detection unit, the newly generated interrupt request has been notified, determines an interrupt type, and sets in the interrupt level storing unit an interrupt level stored in the interrupt level setting unit corresponding to the determined interrupt type, and

a priority determination unit that compares the second interrupt mask level stored in the interrupt level storing unit with the interrupt level of the newly generated interrupt notified from the second interrupt type determination unit, and notifies the interrupt to the virtual machine control unit when the interrupt level of the newly generated interrupt is higher than the second interrupt mask level stored in the interrupt level storing unit;

the virtual machine includes a first virtual machine and a second virtual machine;

the plurality of interrupt controllers include a first interrupt controller corresponding to the first virtual machine, and a second interrupt controller corresponding to the second virtual machine;

the second interrupt controller includes an interrupt level notifying unit that notifies an interrupt level that has been set with respect to each interrupt processed by the second virtual machine at the time of interrupt generation;

the interrupt control unit further includes a notification level reception unit that receives the interrupt level from the interrupt level notifying unit and notifies the received interrupt level to the second interrupt type determination unit;

the second interrupt type determination unit outputs the interrupt level notified by the notification level reception unit to the interrupt level setting unit, and

the interrupt level setting unit takes the interrupt level outputted by the second interrupt type determination unit as an interrupt level relating to a notification from the second interrupt controller.

2. The virtual machine control device according to claim 1, wherein

the interrupt level storing unit stores the interrupt level of the interrupt received by the second interrupt type determination unit as an interrupt level corresponding to the type of the interrupt that has been stored in advance in the interrupt level setting unit, and further stores as an interrupt level the first interrupt mask level notified from the first interrupt mask level setting unit to the second interrupt mask level setting unit, and

the priority determination unit does not notify to the virtual machine control unit an interrupt having a level equal to or less than the interrupt level having the highest priority among the interrupt levels that have been stored in the interrupt level storing unit.

3. The virtual machine control device according to claim 1, wherein

the virtual machine control unit further comprises a virtual machine state storing unit that stores operation states of a plurality of virtual machines;

the interrupt control unit further includes an interrupt mask setting unit that sets the priority determination unit so as to mask the generated interrupt request in order not to notify an interrupt request to the virtual machine control unit;

the second interrupt type determination unit updates an operation state of the virtual machine, which has been active immediately before, stored in the virtual machine state storing unit to an idle state when the generated interrupt has been determined to be an interrupt request from the idle detection unit, and

the interrupt mask setting unit sets the priority determination unit so as to mask an interrupt request from the idle detection unit and causes the virtual machine control device to implement a transition to the idle state when the operation states of all of the virtual machines are the idle state.

4. The virtual machine control device according to claim 1, further comprising an interrupt level notifying unit that notifies a plurality of interrupt levels that differ according to the type of interrupt to the interrupt control unit, wherein

the interrupt control unit further comprises a notification level reception unit that receives the plurality of interrupt levels notified by the interrupt level notifying unit and stores the received plurality of interrupt levels as respective first interrupt mask levels in the interrupt mask level setting table.

5. The virtual machine control device according to claim 1, wherein

the virtual machine control unit includes:

an interrupt end detection unit that detects that the interrupt processing by the virtual machine has ended, and

an interrupt return destination rewrite unit that saves in the interrupt return destination storing unit an interrupt return destination address designated by the notified interrupt and rewrites the interrupt return destination address in an address of the interrupt end detection unit.

6. The virtual machine control device according to claim 1, further comprising an interrupt negate detection unit that detects that an interrupt request outputted from a peripheral device has been canceled and generates an interrupt to the interrupt control unit.

7. The virtual machine control device according to claim 1, wherein

the interrupt level notified by the interrupt level notifying unit includes a first interrupt level and a second interrupt level having a priority lower than that of the first interrupt level;

the first interrupt level and the second interrupt level are lower than an interrupt level that is set when an interrupt request is notified from the first interrupt controller;

the first interrupt mask level corresponding to the first interrupt level stored in the interrupt mask level setting table is higher than the first interrupt mask level that signifies a priority of a task processing of the first virtual machine, and

the first interrupt mask level corresponding to the second interrupt level stored in the interrupt mask level setting table is lower than the first interrupt mask level that signifies a priority of a task processing of the first virtual machine.

8. A non-transitory computer readable recording medium storing a virtual machine control program that causes a computer to function as at least:

a virtual machine control unit that controls switching of a plurality of virtual machines operating on a CPU;

a plurality of interrupt controllers that output an interrupt request notifying a generation of an interrupt as one virtual machine from among the plurality of virtual machines performs processing;

an interrupt control unit that receives the interrupt request from the plurality of interrupt controllers and controls notification of the interrupt to the virtual machine control unit on the basis of an interrupt level indicating a priority of the generated interrupt; and

an idle detection unit that detects that the CPU has executed a command for implementing a transition to an idle state and outputs the interrupt request to the interrupt control unit, wherein

the virtual machine control unit includes;

a first interrupt type determination unit that determines a type of the interrupt notified from the interrupt control unit;

an interrupt return destination storing unit that stores a program counter value immediately preceding the interrupt generation when the generated interrupt is determined to be an interrupt relating to a presently active virtual machine on the basis of the interrupt type determined by the first interrupt type determination unit;

an interrupt mask level setting table that stores in advance as a first interrupt mask level a priority of an interrupt processing executed in each virtual machine and a priority of a task processing executed in each virtual machine;

a first interrupt mask level setting unit that notifies to the interrupt control unit the first interrupt mask level corresponding to a next processing to be executed by the virtual machine from among the interrupt mask levels in the interrupt mask level setting table when the interrupt processing by the virtual machine has ended, and

an update unit that requests the interrupt control unit to update the interrupt level in the interrupt control unit to the newest state, and

the interrupt control unit includes;

an interrupt level storing unit that stores one or more interrupt levels indicating the priority of the generated interrupt and stores as a second interrupt mask level the interrupt level having the highest priority among the stored interrupt levels;

a second interrupt mask level setting unit that sets in the interrupt level storing unit as an interrupt level the first interrupt mask level notified by the first interrupt mask level setting unit;

an interrupt level setting unit that takes information indicating from where the interrupt request has been notified as an interrupt type and stores an interrupt level corresponding to each interrupt type;

a second interrupt type determination unit that receives the newly generated interrupt request, determines from where, among the plurality of interrupt controllers and the idle detection unit, the newly generated interrupt request has been notified, determines an interrupt type, and sets in the interrupt level storing unit an interrupt level stored in the interrupt level setting unit corresponding to the determined interrupt type, and

a priority determination unit that compares the second interrupt mask level stored in the interrupt level storing unit with an interrupt level of the newly generated interrupt notified from the second interrupt type determination unit, and notifies the interrupt to the virtual machine control unit when the interrupt level of the newly generated interrupt is higher than the second interrupt mask level stored in the interrupt level storing unit;

the virtual machine includes a first virtual machine and a second virtual machine;

the plurality of interrupt controllers include a first interrupt controller corresponding to the first virtual machine, and a second interrupt controller corresponding to the second virtual machine;

the second interrupt controller includes an interrupt level notifying unit that notifies an interrupt level that has been set with respect to each interrupt processed by the second virtual machine at the time of interrupt generation;

the interrupt control unit further includes a notification level reception unit that receives the interrupt level from the interrupt level notifying unit and notifies the received interrupt level to the second interrupt type determination unit;

the second interrupt type determination unit outputs the interrupt level notified by the notification level reception unit to the interrupt level setting unit, and

the interrupt level setting unit takes the interrupt level outputted by the second interrupt type determination unit as an interrupt level relating to the notification from the second interrupt controller.

9. A virtual machine control circuit comprising:

a virtual machine control circuit that controls switching of a plurality of virtual machines operating on a CPU;

a plurality of interrupt control circuits output an interrupt request notifying a generation of an interrupt as one virtual machine from among the plurality of virtual machines performs processing;

an interrupt control circuit that receives the interrupt request from the plurality of interrupt control circuits and controls notification of the interrupt to the virtual machine control circuit on the basis of an interrupt level indicating a priority of the generated interrupt; and

an idle detection circuit that detects that the CPU has executed a command for implementing a transition to an idle state and outputs the interrupt request to the interrupt control circuit, wherein

the virtual machine control circuit includes;

a first interrupt type determination circuit that determines a type of the interrupt notified from the interrupt control circuit;

an interrupt return destination storing circuit that stores a program counter value immediately preceding the interrupt generation when the generated interrupt is determined to be an interrupt relating to a presently active virtual machine on the basis of the interrupt type determined by the first interrupt type determination circuit;

an interrupt mask level setting table that stores in advance as a first interrupt mask level a priority of an interrupt processing executed in each virtual machine and a priority of a task processing executed in each virtual machine;

a first interrupt mask level setting circuit that notifies to the interrupt control circuit the first interrupt mask level corresponding to a next processing to be executed by the virtual machine from among the interrupt mask levels in the interrupt mask level setting table when the interrupt processing by the virtual machine has ended, and

an update circuit that requests the interrupt control circuit to update the interrupt level in the interrupt control circuit to the newest state, and

the interrupt control circuit includes;

an interrupt level storing circuit that stores one or more interrupt levels indicating the priority of the generated interrupt and stores as a second interrupt mask level the interrupt level having the highest priority among the stored interrupt levels;

a second interrupt mask level setting circuit that sets in the interrupt level storing circuit as an interrupt level the first interrupt mask level notified by the first interrupt mask level setting circuit;

an interrupt level setting circuit that takes information indicating from where the interrupt request has been notified as an interrupt type and stores an interrupt level corresponding to each interrupt type;

a second interrupt type determination circuit that receives the newly generated interrupt request, determines from where, among the plurality of interrupt control circuits and the idle detection circuit, the newly generated interrupt request has been notified, determines an interrupt type, and sets in the interrupt level storing circuit an interrupt level stored in the interrupt level setting circuit corresponding to the determined interrupt type, and

a priority determination circuit that compares the second interrupt mask level stored in the interrupt level storing circuit with an interrupt level of the newly generated interrupt notified from the second interrupt type determination circuit, and notifies the interrupt to the virtual machine control circuit when the interrupt level of the newly generated interrupt is higher than the second interrupt mask level stored in the interrupt level storing circuit;

the virtual machine includes a first virtual machine and a second virtual machine;

the plurality of interrupt control circuits include a first interrupt control circuit corresponding to the first virtual machine, and a second interrupt control circuit corresponding to the second virtual machine;

the second interrupt control circuit includes an interrupt level notifying circuit that notifies an interrupt level that has been set with respect to each interrupt processed by the second virtual machine at the time of interrupt generation;

the interrupt control circuit further includes a notification level reception circuit that receives the interrupt level from the interrupt level notifying circuit and notifies the received interrupt level to the second interrupt type determination circuit;

the second interrupt type determination circuit outputs the interrupt level notified by the notification level reception circuit to the interrupt level setting circuit, and

the interrupt level setting circuit takes the interrupt level outputted by the second interrupt type determination circuit as an interrupt level relating to a notification from the second interrupt control circuit.