Override system and method for memory access management

• US 8,504,794 B1
• Filed: 11/01/2006
• Issued: 08/06/2013
• Est. Priority Date: 11/01/2006
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Glasco, David B., Montrym, John S., Yuan, Lingfeng, Keller, Robert C.
• Primary Examiner(s): Gu, Shawn X
• Application Number:
  US11/591,857
• Time in Patent Office: 2,470 Days
• Field of Search: None
• US Class Current: 711/203
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 2212/681 Multi-level TLB, e.g. microTLB and main TLB
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0655 Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
• CPC Class Codes: G06F 3/0673 Single storage device

Abstract

A memory management system and method are described. In one embodiment, a memory management system includes a memory management unit for virtualizing context memory storage and independently controlling access to the context memory without interference from other engine activities. The shared resource management unit overrides a stream of access denials (e.g., NACKs) associated with an access problem. The memory management system and method facilitate access to memory while controlling translation between virtual and physical memory “spaces”. In one embodiment the memory management system includes a translation lookaside buffer and a fill component. The translation lookaside buffer tracks information associating a virtual memory space with a physical memory space. The fill component tracks the status of an access request progress from a plurality of engines independently and faults that occur in attempting to access a memory space.

Claims

1. A shared resource management system comprising:

a plurality of engines for performing processing;

a memory for supporting said processing; and

a memory management unit for virtualizing memory storage of context information, wherein a fault expediting access prevention indication is prevented from impacting accesses associated with said context information.

2. A shared resource management system of claim 1 wherein said memory management unit permits context information to be stored and retrieved from bulk storage on the fly.

3. A shared resource management system of claim 1 wherein said memory management unit allows context information to be stored in varying physical memory locations.

4. A shared resource management system of claim 1 wherein preventing said fault expediting access prevention indications from impacting accesses associated with the context information makes accesses to store said context information are immune to fault expediting access prevention indications.

5. A shared resource management system of claim 1 wherein a shared resource is a translation buffer resource.

6. A shared resource management system of claim 1 wherein said engines have a fault negative acknowledgement (NACK) restart capability.

7. A shared resource management system of claim 1 wherein said memory management unit handles a plurality of contexts.