Semiconductor device

• US 8,513,716 B2
• Filed: 01/28/2011
• Issued: 08/20/2013
• Est. Priority Date: 01/29/2010
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Ueda, Yoshitaka, Yamada, Kouichi, Wada, Atsushi, Kobayashi, Shigeto
• Primary Examiner(s): PERT, EVAN T
• Application Number:
  US13/016,481
• Publication Number:
  US 20110186935A1
• Time in Patent Office: 935 Days
• Field of Search: 257/288, 257/368, 257/E29.122, 257/E29.136, 257/390, 257/E27.081
• US Class Current: 257/288
• CPC Class Codes: H01L 23/4824 Pads with extended contours, e.g. grid structure, branch structure, finger structure
• CPC Class Codes: H01L 23/528 Geometry or layout of the interconnection structure H01L27/0207 takes precedence; algorithms G06F30/00
• CPC Class Codes: H01L 27/0207 Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
• CPC Class Codes: H01L 29/41758 for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular H01L29/41733 - H01L29/4175 take precedence
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10B 99/22 including field-effect components

Abstract

A MOS transistor includes a gate electrode formed in a grid pattern, source regions and drain regions each surrounded by the gate electrode, and a source metal wiring connected to the source regions via source contacts and a drain metal wiring connected to the drain regions via drain contacts. The source metal wiring and the drain metal wiring are disposed along one direction of the grid of the gate electrode. Each of the source regions and the drain regions is a rectangular form having its long side along the length direction of each metal wiring. The source metal wiring and the drain metal wiring are each formed in a zigzag manner in the length direction and are respectively connected to the source contacts and the drain contacts.

Claims

1. A semiconductor device having a waffle transistor, the waffle transistor comprising:

a gate electrode formed in a grid pattern;

source regions and drain regions each surrounded by said gate electrode, forming said waffle transistor; and

metal wirings disposed along one direction of the grid pattern of said gate electrode and connected to the source regions and drain regions via contacts,

wherein the source regions and the drain regions are arranged adjoining each other with said gate electrode held therebetween, and

wherein each of the source regions and the drain regions is a rectangular form having a long side along a length direction of said metal wiring.

2. A semiconductor device according to claim 1, wherein said metal wirings include a source metal wiring connected to source contacts formed in the source regions and a drain metal wiring connected to drain contacts formed in the drain regions, and wherein the source metal wiring and the drain metal wiring are each formed in a zigzag manner in a length direction and are respectively connected to the source contacts and the drain contacts.

3. A semiconductor device according to claim 2, wherein the source metal wiring and the drain metal wiring are each disposed in superposition on the gate electrode extending in a length direction thereof.

4. A semiconductor device according to claim 2, wherein the source metal wiring has an identical width in a length direction thereof, and the drain metal wiring has an identical width in a length direction thereof.

5. A semiconductor device according to claim 3, wherein the source metal wiring has an identical width in a length direction thereof, and the drain metal wiring has an identical width in a length direction thereof.