Computers or microchips with a hardware side protected by a primary internal hardware firewall leaving an unprotected hardware side connected to a network, and with multiple internal hardware compartments protected by multiple secondary interior hardware firewalls

• US 8,516,033 B2
• Filed: 07/11/2011
• Issued: 08/20/2013
• Est. Priority Date: 11/29/1996
• Status: Expired due to Fees

• Current Assignee: Frampton E. Ellis III
• Original Assignee: Frampton E. Ellis III
• Inventors: Ellis, Frampton E. III
• Primary Examiner(s): STRANGE, AARON N
• Application Number:
  US13/180,164
• Publication Number:
  US 20110271339A1
• Time in Patent Office: 771 Days
• Field of Search: 709/201, 709/209, 709/250, 726/11, 712/10
• US Class Current: 709/201
• CPC Class Codes: A01N 25/30 characterised by the surfactants
• CPC Class Codes: G06F 11/1666 where the redundant component is memory or memory area
• CPC Class Codes: G06F 11/30 Monitoring
• CPC Class Codes: G06F 15/76 Architectures of general purpose stored program computers with program plugboard G06F15/08; multicomputers G06F15/16
• CPC Class Codes: G06F 21/00 Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
• CPC Class Codes: G06F 21/53 by executing in a restricted environment, e.g. sandbox or secure virtual machine
• CPC Class Codes: G06F 21/70 Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
• CPC Class Codes: G06F 21/74 operating in dual or compartmented mode, i.e. at least one secure mode
• CPC Class Codes: G06F 9/5072 Grid computing
• CPC Class Codes: H04L 43/00 Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 63/02 for separating internal from external traffic, e.g. firewalls
• CPC Class Codes: H04L 63/0209 Architectural arrangements, e.g. perimeter networks or demilitarized zones
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 69/14 Multichannel or multilink protocols
• CPC Class Codes: H04L 69/329 in the application layer [OSI layer 7]
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

A personal computer or microchip comprising: a primary internal hardware firewall separating a protected side of the computer'"'"'s hardware from a network side connected to a network of computers; a master controller and/or a microprocessor is located within the hardware protected side protected by the primary internal hardware firewall; microprocessors are located within the network side located between the primary internal hardware firewall and the network connection; the network side microprocessors are separate components from the primary internal hardware firewall; the primary internal hardware firewall by its internal location not restricting access by the network to the computer'"'"'s network side, thereby not restricting the network operations of the computer, which are conducted in the network side using the networked microprocessors; and one or more secondary interior hardware firewalls form one or more separate hardware protected compartments in the hardware protected side, a compartment including for example a hardware protected microprocessor.

Claims

1. A personal computer configured for use by at least one individual user, said computer comprising:

at least a primary internal hardware firewall configured to protect a hardware protected side of the computer'"'"'s hardware from a network side that is not protected by said primary internal hardware firewall,

at least one microprocessor and at least a non-volatile memory is located within said hardware protected side;

one or more network side microprocessors with at least a volatile memory and at least one network communications component are located within said network side, said network side being configured for connection to the network of computers and being located between said primary internal hardware firewall and a wired or wireless network connection to said network of computers;

said one or more network side microprocessors being separate components from said at least one network communications component, and both said network side microprocessors and said at least one network communication component being separate from said primary internal hardware firewall;

said primary internal firewall by its internal location not restricting access by the network to the network side, thereby not restricting the network operations of the computer, which are conducted in said network side using said network side microprocessors;

at least a first secondary interior hardware firewall configured to form a first separate hardware protected compartment located in said hardware protected side; and

at least one hardware protected side microprocessor with at least a non-volatile memory is located in said first separate hardware protected compartment located in said hardware protected side.

2. The computer of claim 1, wherein said first secondary interior hardware firewall is configured to deny access to said first separate hardware protected compartment by said network.

3. The computer of claim 1, further comprising a second said secondary interior hardware firewall configured to form a second said separate hardware protected compartment located in said first separate hardware protected compartment;

and

at least one hardware protected side microprocessor with at least a non-volatile memory is located in said second separate hardware protected compartment.

4. The computer of claim 3, wherein said second secondary interior hardware firewall is configured to deny access to said second separate hardware protected compartment by said network.

5. The computer of claim 3, further comprising a third said secondary interior hardware firewall configured to form a third said separate hardware protected compartment located in said second separate hardware protected compartment;

and

at least one said hardware protected side microprocessor with at least a non-volatile memory is located in said third separate hardware protected compartment.

6. The computer of claim 5, wherein said third secondary interior hardware firewall is configured to deny access to said third separate hardware protected compartment by said network.

7. The computer of claim 5, further comprising a fourth said secondary interior hardware firewall configured to form a fourth said separate hardware protected compartment located in said third separate hardware protected compartment;

and

at least one said hardware protected side microprocessor with at least a non-volatile memory is located in said fourth separate hardware protected compartment.

8. The computer of claim 7, wherein said fourth secondary interior hardware firewall is configured to deny access to said fourth separate hardware protected compartment by said network.

9. The computer of claim 7, further comprising at least four additional said secondary interior hardware firewalls configured to form at least four additional said separate hardware protected compartments located in said hardware protected side;

and

at least four additional said hardware protected side microprocessors, each with at least a volatile memory and each located in a separate one of said four additional separate hardware protected compartments located in said hardware protected side.

10. The computer of claim 7, further comprising a master controlling device located in said fourth separate hardware protected compartment located in said hardware protected side.

11. The computer of claim 5, further comprising a master controlling device located in said third separate hardware protected compartment located in said hardware protected side.

12. The computer of claim 3, further comprising a master controlling device located in said second separate hardware protected compartment located in said hardware protected side.

13. The computer of claim 1, further comprising a master controlling device located in said first separate hardware protected compartment located in said hardware protected side.

14. The computer of claim 1, further comprising a second said secondary interior hardware firewall configured to form a second said separate hardware protected compartment located in said network side;

and

at least one microprocessor is located in said second separate hardware protected compartment located in said network side.

15. The computer of claim 14, further comprising a third said secondary interior hardware firewall configured to form a third said separate hardware protected compartment located in said network side;

and

at least one microprocessor is located in said third separate hardware protected compartment located in said network side.

16. The computer of claim 14, wherein at least one network user utilizes at least one of said network side microprocessors located in at least one said separate hardware protected compartment located in said network side.

17. The computer of claim 1, further comprising at least four additional said secondary interior hardware firewalls configured to form at least four additional said separate hardware protected compartments located in said network side;

and

at least four additional microprocessors, each is located in one said additional separate hardware protected compartment located in said network side.

18. The computer of claim 1, further comprising a hardware memory component with an internal hardware firewall configured to protect a hardware protected side of the hardware memory component from a network side of the hardware memory component, said network side of said hardware memory component not being protected by said internal hardware firewall of said hardware memory component.

19. The computer of claim 1, wherein the network operations of the computer are conducted only in the network side using said network side microprocessors.

20. The computer of claim 1, wherein said at least one network communications component includes at least a digital signal processor or a modem.

21. The computer of claim 1, wherein the computer is a node in an array of other computers linked together as nodes to form a server and/or a mainframe and/or a supercomputer.

22. The computer of claim 1, further comprising a memory component of the computer located in at least one said separate hardware protected compartment that is located in the hardware protected side of the computer'"'"'s hardware, said separate hardware protected compartment being protected at least by an additional said secondary interior hardware firewall.

23. The computer of claim 1, wherein at least a portion of the files of at least one operating system of the computer is located inside each of at least three additional said separate hardware protected compartments, each said additional said separate hardware protected compartment being protected by at least a separate secondary inner hardware firewall.

24. The computer of claim 1, wherein at least a portion of the files of at least one software application of the computer is located inside each of at least three additional said separate hardware protected compartments, each said additional said separate hardware protected compartment being protected by at least a separate secondary inner hardware firewall.

25. The computer of claim 1, wherein at least a portion of the files of at least one user of the computer is located inside each of at least three additional said separate hardware protected compartments, each said additional said separate hardware protected compartment being protected by at least a separate secondary inner hardware firewall.

26. The computer of claim 1, wherein said hardware protected side includes at least one master controlling device of the computer.

27. The computer of claim 1, wherein said computer is configured to be a node in an array of other said computers as nodes linked together to form a server and/or a mainframe and/or a supercomputer.

28. The computer of claim 1, wherein said computer comprises a microchip configured for use in a personal computer by at least one individual user, said microchip comprising at least said microprocessor, at least said primary internal hardware firewall and at least said first secondary interior hardware firewall.

29. A microchip configured for use in a personal computer by at least one individual user, said microchip comprising:

a microprocessor, the microprocessor including at least two processing units; and

at least a primary internal hardware firewall is configured to protect a hardware protected side of the microchip'"'"'s hardware from a network side that is not protected by said primary internal hardware firewall,

at least one of the processing units of the microprocessor is located within said hardware protected side;

one or more of the processing units of the microprocessor is located within said network side, and said network side being configured for connection to the network of computers and being located between said primary internal hardware firewall and a wired or wireless network connection to said network of computers;

said one or more network side processing units being separate from said primary internal hardware firewall;

said primary internal firewall by its internal location not restricting access by the network to the unprotected network side of the microchip, thereby not restricting the network operations of the microchip, which are conducted in said network side using said network side processing units of the microchip;

at least a first secondary interior hardware firewall is configured to form at least a first separate hardware protected compartment located in the hardware protected side; and

at least one hardware protected side processing unit is located in said at least one separate hardware protected compartment located in said hardware protected side.

30. The microchip of claim 29, wherein the network operations of the computer are conducted only in the network side using said network side microprocessors.

31. The microchip of claim 29, wherein at least one network communications component is located in said network side.

32. The microchip of claim 31, wherein said at least one network communications component located in said network side includes at least a digital signal processor or a modem.

33. The microchip of claim 29, wherein said hardware protected side includes at least a non-volatile memory and said network side includes at least a volatile memory.

34. The microchip of claim 29, wherein said first secondary interior hardware firewall is configured to deny access to said first separate hardware protected compartment by said network.

35. The microchip of claim 29, further comprising a second said secondary interior hardware firewall configured to form a second said separate hardware protected compartment located in said first separate hardware protected compartment;

and

at least one hardware protected side microprocessor with at least a non-volatile memory is located in said second separate hardware protected compartment.

36. The microchip of claim 35, wherein said second secondary interior hardware firewall is configured to deny access to said second separate hardware protected compartment by said network.

37. The microchip of claim 35, further comprising a third said secondary interior hardware firewall configured to form a third said separate hardware protected compartment located in said second separate hardware protected compartment;

and

at least one said hardware protected side microprocessor with at least a non-volatile memory is located in said third separate hardware protected compartment.

38. The microchip of claim 37, wherein said third secondary interior hardware firewall is configured to deny access to said third separate hardware protected compartment by said network.

39. The microchip of claim 38, further comprising a fourth said secondary interior hardware firewall configured to form a fourth said separate hardware protected compartment located in said third separate hardware protected compartment;

and

at least one said hardware protected side microprocessor with at least a non-volatile memory is located in said fourth separate hardware protected compartment.

40. The microchip of claim 39, wherein said fourth secondary interior hardware firewall is configured to deny access to said fourth separate hardware protected compartment by said network.

41. The microchip of claim 39, further comprising at least four additional said secondary interior hardware firewalls configured to form at least four additional said separate hardware protected compartments located in said hardware protected side;

and

at least four additional said hardware protected side microprocessors, each with at least a volatile memory and each located in a separate one of said four additional separate hardware protected compartments located in said hardware protected side.

42. The microchip of claim 39, further comprising a master controlling device located in said fourth separate hardware protected compartment located in said hardware protected side.

43. The microchip of claim 37, further comprising a master controlling device located in said third separate hardware protected compartment located in said hardware protected side.

44. The microchip of claim 35, further comprising a master controlling device located in said second separate hardware protected compartment located in said hardware protected side.

45. The microchip of claim 29, further comprising a master controlling device located in said first separate hardware protected compartment located in said hardware protected side.

46. The microchip of claim 29, further comprising a second said secondary interior hardware firewall configured to form a second said separate hardware protected compartment located in said network side;

and

at least one microprocessor is located in said second separate hardware protected compartment located in said network side.

47. The microchip of claim 46, further comprising a third said secondary interior hardware firewall configured to form a third said separate hardware protected compartment located in said network side;

and

at least one microprocessor is located in said third separate hardware protected compartment located in said network side.

48. The microchip of claim 46, wherein at least one network user utilizes at least one of said network side microprocessors located in at least one said separate hardware protected compartment located in said network side.

49. The microchip of claim 29, further comprising at least four additional said secondary interior hardware firewalls configured to form at least four additional said separate hardware protected compartments located in said network side;

and

at least four additional microprocessors, each is located in one said additional separate hardware protected compartment located in said network side.

50. The microchip of claim 29, further comprising a hardware memory component with an internal hardware firewall configured to protect a hardware protected side of the hardware memory component from a network side of the hardware memory component, said network side of said hardware memory component not being protected by said internal hardware firewall of said hardware memory component.

51. The microchip of claim 29, wherein the microchip is a node in an array of computers linked together as nodes to form a server and/or a mainframe and/or a supercomputer.

52. The microchip of claim 29, further comprising a memory component of the microchip located in at least one said separate hardware protected compartment that is located in the hardware protected side of the microchip'"'"'s hardware, said separate hardware protected compartment being protected at least by an additional said secondary interior hardware firewall.

53. The microchip of claim 29, wherein at least a portion of the files of at least one operating system of the microchip is located inside each of at least three additional said separate hardware protected compartments, each said additional said separate hardware protected compartment being protected by at least a separate secondary inner hardware firewall.

54. The microchip of claim 29, wherein at least a portion of the files of at least one software application of the microchip is located inside each of at least three additional said separate hardware protected compartments, each said additional said separate hardware protected compartment being protected by at least a separate secondary inner hardware firewall.

55. The microchip of claim 29, wherein said hardware protected side includes at least one master controlling unit of the microchip.

56. The microchip of claim 29, wherein said microchip is in a computer configured to be a node in an array of other said computers as nodes linked together to form a server and/or a mainframe and/or a supercomputer.

57. The microchip of claim 29, wherein at least a portion of the files of at least one user of the computer is located inside each of at least three additional said separate hardware protected compartments, each said additional said separate hardware protected compartment being protected by at least a separate secondary inner hardware firewall.

58. A personal computer configured for use by at least one individual user, said personal computer including a microchip and at least one separate network communications component, said microchip comprising:

a microprocessor, the microprocessor including at least two processing units; and

at least a primary internal hardware firewall configured to protect a hardware protected side of the microchip'"'"'s hardware from a network side of the microchip, said network side is not protected by said primary internal hardware firewall,

at least one of the processing units of the microprocessor is located within said hardware protected side;

one or more of the processing units of the microprocessor is located within said network side, and said network side is configured for connection to the network of computers and being located between said primary internal hardware firewall and a wired or wireless network connection to said network of computers;

said one or more network side processing units being separate from said primary internal hardware firewall;

said primary internal firewall by its location does not restrict access by the network to said network side of the microchip, thereby enabling network operations between the microchip and the network to be conducted in said network side using said network side processing units of the microchip;

at least one secondary inner hardware firewall is configured to form at least one separate hardware protected compartment located in the network side; and

at least one said network side processing unit is located in said at least one separate hardware protected compartment located in said network side.

59. The personal computer of claim 58, wherein said hardware protected side includes a master controlling unit.