Set program parameter instruction

• US 8,516,227 B2
• Filed: 12/07/2010
• Issued: 08/20/2013
• Est. Priority Date: 10/02/2008
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Bartik, Jane H., Heller, Lisa C., Osisek, Damian L., Schmidt, Donald W., West, Patrick M. Jr., Yeh, Phil C.
• Primary Examiner(s): RHU, KRIS M
• Application Number:
  US12/961,929
• Publication Number:
  US 20110078419A1
• Time in Patent Office: 987 Days
• Field of Search: None
• US Class Current: 712/208
• CPC Class Codes: G06F 12/06 Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication G06F12/08 takes precedence
• CPC Class Codes: G06F 12/0802 Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 2212/461 Sector or disk block
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 9/30145 Instruction analysis, e.g. decoding, instruction word fields

Abstract

A measurement sampling facility takes snapshots of the central processing unit (CPU) on which it is executing at specified sampling intervals to collect data relating to tasks executing on the CPU. The collected data is stored in a buffer, and at selected times, an interrupt is provided to remove data from the buffer to enable reuse thereof. The interrupt is not taken after each sample, but in sufficient time to remove the data and minimize data loss.

Claims

1. A computer program product for executing a machine instruction in a central processing unit of a computing environment, the computer program product comprising:

a non-transitory computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising;

obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a set program parameter instruction; and

a first field identifying a general register, the contents of which are added to the contents of a second field to form a second operand address; and

executing the machine instruction, the executing comprising;

responsive to a configuration of the computing environment being configured for sampling to obtain sample data relating to the computing environment, placing a program parameter stored in one or more storage locations designated by the second operand address in a program parameter register, the program parameter register comprising an identifier identifying a task; and

responsive to the configuration not being configured for sampling, executing the machine instruction as a no operation.

2. The computer program product of claim 1, wherein the set program parameter instruction is issued responsive to the task being dispatched, and wherein the set program parameter instruction tags the task with the identifier identifying the task.

3. The computer program product of claim 1, wherein the identifier is provided with sample data, responsive to performing sampling.

4. The computer program product of claim 3, wherein the sample data and the program parameter register comprising the identifier are stored in a sample data block.

5. The computer program product of claim 4, wherein contents of a table entry address register indicate a current entry in the sample data block.

6. The computer program product of claim 5, wherein contents of a data entry address register indicate a next entry in the sample data block.

7. The computer program product of claim 1, wherein the set program parameter instruction is issued asynchronous to issuing an instruction to activate sampling.

8. The computer program product of claim 1, wherein the program parameter is eight bytes and the program parameter register is a 64-bit register.

9. A computer system for executing a machine instruction in a central processing unit of a computing environment, the computer system comprising:

a memory; and

a processor in communications with the memory, wherein the computer system is configured to perform a method, said method comprising;

obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a set program parameter instruction; and

a first field identifying a general register, the contents of which are added to the contents of a second field to form a second operand address; and

executing the machine instruction, the executing comprising;

responsive to a configuration of the computing environment being configured for sampling to obtain sample data relating to the computing environment, placing a program parameter stored in one or more storage locations designated by the second operand address in a program parameter register, the program parameter register comprising an identifier identifying a task; and

responsive to the configuration not being configured for sampling, executing the machine instruction as a no operation.

10. The computer system of claim 9, wherein the set program parameter instruction is issued responsive to the task being dispatched, and wherein the set program parameter instruction tags the task with the identifier identifying the task.

11. The computer system of claim 9, wherein the identifier is provided with sample data, responsive to performing sampling.

12. The computer system of claim 9, wherein the sample data and the program parameter register comprising the identifier are stored in a sample data block.

13. The computer system of claim 9, wherein the set program parameter instruction is issued asynchronous to issuing an instruction to activate sampling.

14. The computer system of claim 9, wherein the program parameter is eight bytes and the program parameter register is a 64-bit register.

15. A method of executing a machine instruction in a central processing unit of a computing environment, the method comprising:

obtaining a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising;

an opcode field identifying a set program parameter instruction; and

a first field identifying a general register, the contents of which are added to the contents of a second field to form a second operand address; and

executing the machine instruction, the executing comprising;

responsive to a configuration of the computing environment being configured for sampling to obtain sample data relating to the computing environment, placing a program parameter stored in one or more storage locations designated by the second operand address in a program parameter register, the program parameter register comprising an identifier identifying a task; and

responsive to the configuration not being configured for sampling, executing the machine instruction as a no operation.

16. The method of claim 15, wherein the set program parameter instruction is issued responsive to the task being dispatched, and wherein the set program parameter instruction tags the task with the identifier identifying the task.

17. The method of claim 15, wherein the identifier is provided with sample data, responsive to performing sampling.

18. The method of claim 15, wherein the sample data and the program parameter register comprising the identifier are stored in a sample data block.

19. The method of claim 15, wherein the set program parameter instruction is issued asynchronous to issuing an instruction to activate sampling.

20. The method of claim 15, wherein the program parameter is eight bytes and the program parameter register is a 64-bit register.