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Secure field-programmable gate array (FPGA) architecture

  • US 8,516,268 B2
  • Filed: 08/23/2010
  • Issued: 08/20/2013
  • Est. Priority Date: 08/23/2010
  • Status: Active Grant
First Claim
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1. A method of configuring a field-programmable gate array (FPGA), the method comprising:

  • receiving, at an FPGA, an encrypted FPGA load-decryption key from a remote key-storage device, wherein the remote key-storage device is external to and operatively connected with the FPGA;

    calculating, at the FPGA, an ephemeral session key;

    decrypting the encrypted FPGA load-decryption key in a key-security unit using the ephemeral session key to provide a decrypted FPGA load-decryption key;

    receiving encrypted FPGA-configuration data at the FPGA;

    decrypting and authenticating, in a configuration-data security unit, the FPGA-configuration data using the decrypted FPGA load-decryption key,wherein decrypting the FPGA-configuration data includes performing a function on the FPGA-configuration data to obtain an initialization vector, or extracting an initialization vector from the FPGA-configuration data;

    receiving a challenge message at the FPGA from an authentication device, wherein the authentication device is external to and operatively connected with the FPGA;

    encrypting the challenge message in a state-encryption unit using the initialization vector to generate a response message; and

    sending the response message to the authentication device, wherein the authentication device decrypts the response to generate a decrypted challenge message and compares the challenge message with the decrypted challenge message to determine the authenticity of the FPGA-configuration data.

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