Semiconductor device and method for manufacturing the same
First Claim
1. A method for manufacturing a semiconductor device, comprising:
- forming a first gate electrode over an insulating surface;
forming a first insulating layer over the first gate electrode;
forming a first source region or a first drain region over the first insulating layer;
forming a source electrode or a drain electrode over the first source region or the first drain region;
forming a second source region or a second drain region over the source electrode or the drain electrode;
forming an oxide semiconductor layer over the second source region and the second drain region after plasma treatment is performed on the first insulating layer, the second source region, and the second drain region;
forming a second insulating layer covering the oxide semiconductor layer; and
forming a second gate electrode over the second insulating layer.
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Abstract
As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver circuit are provided over the same substrate, manufacturing cost can be reduced.
158 Citations
5 Claims
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1. A method for manufacturing a semiconductor device, comprising:
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forming a first gate electrode over an insulating surface; forming a first insulating layer over the first gate electrode; forming a first source region or a first drain region over the first insulating layer; forming a source electrode or a drain electrode over the first source region or the first drain region; forming a second source region or a second drain region over the source electrode or the drain electrode; forming an oxide semiconductor layer over the second source region and the second drain region after plasma treatment is performed on the first insulating layer, the second source region, and the second drain region; forming a second insulating layer covering the oxide semiconductor layer; and forming a second gate electrode over the second insulating layer. - View Dependent Claims (2, 3, 4, 5)
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Specification
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- Resources
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Current AssigneeSemiconductor Energy Laboratory Co., Ltd.
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Original AssigneeSemiconductor Energy Laboratory Co., Ltd.
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InventorsMiyairi, Hidekazu, Akimoto, Kengo, Yamazaki, Shunpei, Osada, Takeshi
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Primary Examiner(s)Pham, Long
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Application NumberUS12/615,615Publication NumberTime in Patent Office1,386 DaysField of Search438/104, 438/158, 438/149, 438/161US Class Current438/104CPC Class CodesH01L 27/1225 with semiconductor material...H01L 29/78648 arranged on opposing sides ...H01L 29/7869 having a semiconductor body...
