Tuner circuit

• US 8,520,148 B2
• Filed: 08/13/2002
• Issued: 08/27/2013
• Est. Priority Date: 09/05/1998
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Chul-min
• Primary Examiner(s): SHANG, ANNAN Q
• Application Number:
  US10/216,875
• Publication Number:
  US 20020191119A1
• Time in Patent Office: 4,032 Days
• Field of Search: 348705-707, 348731-738, 725/151
• US Class Current: 348/731
• CPC Class Codes: H04N 5/4446 IF amplifier circuits specially adapted for B&W TV RF amplifiers in general H03F3/189
• CPC Class Codes: H04N 5/60 for the sound signals
• CPC Class Codes: H04N 5/7755 the recorder being connected to, or coupled with, the antenna of the television receiver
• CPC Class Codes: H04N 9/64 Circuits for processing colour signals H04N9/77 takes precedence; camera processing pipelines for processing colour signals H04N23/84

Abstract

A tuner circuit and a method of designing a tuner circuit for removing a buffer circuit for video drive for increasing drive current capacitance added to an output terminal is provided, unlike a buffer for small-current drive installed in a tuner circuit. The method of designing a tuner circuit has a buffer installed in an integrated circuit (IC) of small-current drive in a video output terminal, and includes an RF converting portion, a tuning portion and a demodulation portion, in which a video output signal of the buffer in IC is input to an input circuit for processing a signal without an external buffer for drive, and the amount of attenuation of a signal at high frequency due to small drive current is measured to improve a frequency characteristic of a video signal in the tuner circuit in proportion to the amount of attenuation. Thus, an additional buffer for drive is not required, so that the number of devices is reduced, to thereby lower the material costs.

Claims

1. A circuit module for processing a radio frequency broadcast signal, comprising:

an input terminal configured to receive said radio frequency broadcast signal;

a tuner circuit in operable connection with said input terminal to receive said radio frequency broadcast signal therefrom, said tuner circuit being configured to convert said received radio frequency broadcast signal into at least an intermediate frequency signal;

a filter in communication with said tuner circuit to receive said intermediate frequency signal therefrom, said filter being configured to define frequency characteristics of said intermediate frequency signal to produce a frequency characteristics defined intermediate frequency signal;

a demodulator in communication with said filter to receive said frequency characteristics defined intermediate frequency signal therefrom, said demodulator being configured to produce at least a video signal based on said frequency characteristics defined intermediate frequency signal; and

an output terminal in communication with said demodulator to receive said video signal therefrom, said output terminal being configured to output said video signal at an output level to an input of an external circuit,

said filter, to compensate an attenuation of a high frequency component, among the defined frequency characteristics of said frequency characteristics defined intermediate frequency signal, when said output terminal outputs said video signal to the input of said external circuit, boosts a gain of the high frequency component of said frequency characteristics defined intermediate frequency signal by a predetermined amount to compensate the attenuation, and

wherein said output terminal outputs said video signal to the input of the external circuit without using an external buffer between said output terminal and said external circuit.

2. The circuit module as set forth in claim 1, wherein said filter compensates the attenuation of said high frequency component of said intermediate frequency signal near a color frequency.

3. The circuit module as set forth in claim 1, wherein said demodulator comprises a sound trap configured to filter out a portion of said frequency characteristics defined intermediate frequency signal, and comprises a plurality of passive circuit elements, a value of at least one of said plurality of passive elements being adjustable to satisfy a predetermined input level of said external circuit, without using an external buffer, to allow adjustment of the range of said portion of said frequency characteristics defined intermediate frequency signal being filtered out.

4. The circuit module as set forth in claim 1, wherein said circuit module is constructed as a single integrated circuit.

5. A broadcasting signal processing system comprised of a circuit module for processing a radio frequency broadcast signal, said circuit module comprising:

an input terminal configured to receive said radio frequency broadcast signal;

a tuner circuit in operable connection with said input terminal to receive said radio frequency broadcast signal therefrom, said tuner circuit being configured to convert said received radio frequency broadcast signal into at least an intermediate frequency signal;

a filter in communication with said tuner circuit to receive said intermediate frequency signal therefrom, said filter being configured to define frequency characteristics of said intermediate frequency signal to produce a frequency characteristics defined intermediate frequency signal;

a demodulator in communication with said filter to receive said frequency characteristics defined intermediate frequency signal therefrom, said demodulator being configured to produce at least a video signal based on said frequency characteristics defined intermediate frequency signal;

an external circuit configured to receive said video signal from said demodulator at an input,

said filter, to compensate an attenuation of a high frequency component, among the defined frequency characteristics of said frequency characteristics defined intermediate frequency signal, when said external circuit receives said video signal from said demodulator, boosts a gain of the high frequency component of said video signal by a predetermined amount to compensate the attenuation, and

wherein said external circuit receives said video signal from said demodulator without using an external buffer between said demodulator and said external circuit.

6. The broadcasting signal processing system as set forth in claim 5, wherein said input terminal, said tuner circuit, and said demodulator are as a single integrated circuit.

7. The broadcasting signal processing system as set forth in claim 5, wherein an input impedance of said external circuit is at least 30KΩ

.

8. The broadcasting signal processing system as set forth in claim 5, wherein said filter compensates the attenuation of said high frequency component of said intermediate frequency signal near a color frequency.

9. The broadcasting signal processing system as set forth in claim 5, wherein said demodulator comprises a sound trap configured to filter out a portion of said frequency characteristics defined intermediate frequency signal, and comprises a plurality of passive circuit elements, a value of at least one of said plurality of passive elements being adjustable to satisfy a predetermined input level of said external circuit, without using an external buffer, to allow adjustment of a range of said portion of said frequency characteristics defined intermediate frequency signal being filtered out.

10. The broadcasting signal processing system as set forth in claim 5, wherein said external circuit selectively engages an input of said video signal processor with either an output of said demodulator or an external video signal source.

11. The broadcast signal processing system as set forth in claim 10, wherein said jack input switch circuit has an input impedance of at least 30 kΩ

in view of the output of said demodulator, when said jack input switch is engaging said input of said video signal processor with said output of said demodulator.

12. A tuner circuit, comprising:

a demodulation circuit comprising an integrated circuit and configured to demodulate an intermediate frequency signal to generate a demodulated video signal, said demodulation circuit comprising;

a filter configured, to compensate an attenuation of a high frequency component, among frequency characteristics of said intermediate frequency signal, when the tuner circuit outputs the demodulated video signal, to boost a gain of the high frequency component of said intermediate frequency signal by a predetermined amount to compensate for the attenuation;

said tuner circuit not having a buffer external to the integrated circuit for driving the demodulated video signal.

13. The tuner circuit as claimed in claim 12, wherein said filter is a SAW filter configured to boost the high frequency component.

14. The tuner circuit as claimed in claim 13, wherein the high frequency component that is boosted is a frequency near a color frequency f_c of the demodulated video signal.

15. The tuner circuit as claimed in claim 13, wherein said SAW filter has band characteristics such that a predetermined difference of gains among a picture frequency fp, a color frequency fc, and a sound frequency fs of said demodulated video signal is generated to provide the boost of the high frequency component.

16. The tuner circuit as claimed in claim 12, wherein said demodulation circuit further comprises a sound trap configured to provide further compensation to supplement the compensation by the filter.

17. The tuner circuit as claimed in claim 16, wherein a sharpness and attenuation of said sound trap are set to provide the at least part of the compensation.

18. The tuner circuit as claimed in claim 12, wherein said demodulation circuit further comprises:

a buffer; and

a video signal level adjuster;

said buffer configured to provide the demodulated video signal to the video signal level adjuster, and the video signal level adjuster configured to adjust a level of the demodulated video signal to a level appropriate for inputting to a circuit external to said tuner circuit.

19. The tuner circuit as claimed in claim 18, wherein said buffer has a driving current of approximately 0.5 to 1.0 milli-Amperes.

20. The tuner circuit as claimed in claim 18, wherein said video signal level adjuster is a voltage divider.

21. A system, comprising:

a tuner circuit having a demodulation circuit comprising an integrated circuit and configured to demodulate an intermediate frequency signal to generate a demodulated video signal, said demodulation circuit comprising;

a filter configured, to compensate an attenuation of a high frequency component, among frequency characteristics of the intermediate frequency signal, when an output terminal outputs the demodulated video signal, to boost a gain of the high frequency component of said intermediate frequency signal by a predetermined amount to compensate for the attenuation, and

the output terminal that outputs the demodulated video signal;

said tuner circuit not having a buffer external to the integrated circuit for driving the demodulated video signal.

22. A system, comprising:

a tuner circuit configured to generate a demodulated video signal; and

an external circuit, outside of the tuner circuit, that receives the demodulated video signal from the tuner circuit without said demodulated video signal having passed through a buffer external to the integrated circuit, said external circuit having an input impedance of at least 30KΩ

to compensate for a reduction in drive current of the demodulated video signal caused by absence of a buffer external to the integrated circuit.

23. The system of claim 22, wherein said tuner circuit comprises:

a demodulation circuit configured to demodulate an intermediate frequency signal in a manner that provides compensation for attenuation of a high frequency component of the intermediate frequency signal, to generate the demodulated video signal.

24. The system of claim 23, wherein said demodulation circuit comprises a filter configured to provide at least part of the compensation for the attenuation.

25. The system as claimed in claim 23, wherein said filter is a SAW filter configured to boost the high frequency component of the intermediate frequency signal in accordance with an amount of the attenuation.

26. The system as claimed in claim 25, wherein the high frequency component that is boosted is a frequency near a color frequency f_c of the demodulated video signal.

27. The system as claimed in claim 26, wherein said SAW filter has band characteristics such that a predetermined difference of gains among a picture frequency fp, a color frequency fc, and a sound frequency fs of said demodulated video signal is generated to provide the boost of the high frequency component.

28. The system as claimed in claim 26, wherein said demodulation circuit comprises a sound trap configured to provide at least part of the compensation.

29. The system as claimed in claim 28, wherein a sharpness of said sound trap is set to provide the at least part of the compensation.

30. The system as claimed in claim 23, wherein said demodulation circuit comprises:

a buffer within the integrated circuit; and

a video signal level adjuster;

said buffer within the integrated circuit configured to provide the demodulated video signal to the video signal level adjuster, and the video signal level adjuster configured to adjust a level of the demodulated video signal to a level appropriate for inputting to a circuit external to said tuner circuit.

31. The system as claimed in claim 30, wherein said buffer has a driving current of approximately 0.5 to 1.0 milli-Amperes.

32. The system as claimed in claim 30, wherein said video signal level adjuster is a voltage divider.

33. The system as claimed in claim 22, wherein the integrated circuit further comprises an output terminal that outputs the demodulated video signal, and the system further comprises a portion of a printed circuit board, the portion comprising a pattern that electrically couples said output terminal to an input terminal of an element external to said tuner circuit.