Data equalizing circuit and data equalizing method
First Claim
1. A data equalizing circuit comprising:
- an equalizer configured to control a gain of data according to a value of a control code; and
a detection unit configured to divide n cycles of the data into N periods, count data transition frequencies for n/N periods while changing the value of the control code, calculate dispersion values of data transition frequencies for 1/N periods of the data from the data transition frequencies for the n/N periods, and finally output the value of the control code corresponding to a largest dispersion value,wherein n is equal to or greater than 2 and is set such that boundaries of the respective n/N periods of the data have different positions in the 1 UI(unit interval) data, wherein the detection unit is implemented by hardware.
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Accused Products
Abstract
A data equalizing circuit includes an equalizer configured to control a gain of data according to a value of a control code and output a controller gain; and a detection unit configured to divide n cycles of the data into N periods, count data transition frequencies for n/N periods while changing the value of the control code, calculate dispersion values of data transition frequencies for 1/N periods of the data from the data transition frequencies for the n/N periods, and finally output the value of the control code corresponding to a largest dispersion value, wherein n is equal to or greater than 2 and is set such that boundaries of the respective n/N periods of the data have different positions in the 1 UI data.
7 Citations
17 Claims
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1. A data equalizing circuit comprising:
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an equalizer configured to control a gain of data according to a value of a control code; and a detection unit configured to divide n cycles of the data into N periods, count data transition frequencies for n/N periods while changing the value of the control code, calculate dispersion values of data transition frequencies for 1/N periods of the data from the data transition frequencies for the n/N periods, and finally output the value of the control code corresponding to a largest dispersion value, wherein n is equal to or greater than 2 and is set such that boundaries of the respective n/N periods of the data have different positions in the 1 UI(unit interval) data, wherein the detection unit is implemented by hardware. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A data equalizing circuit comprising:
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an equalizer configured to control a gain of data according to a value of a control code; a multi-phase locked loop configured to receive a reference clock and output N number of clocks having a frequency corresponding to 1/n times a frequency of the data with a phase difference of n/N; a data latching section configured to store the data as N number of latched data in synchronization with the N number of clocks, respectively; a data transition counting section configured to compare adjacent values of the N number of latched data and count data transition frequencies for n/N periods; a counting completion signal generating section configured to generate a counting completion signal when counting of the data transition frequencies for the n/N periods is completed; and a controller configured to calculate and store dispersion values of data transition frequencies for 1/N periods from the data transition frequencies for the n/N periods in response to the counting completion signal while changing the value of the control code, and output the value of the control code corresponding to a largest dispersion value, wherein n is equal to or greater than 2 and is set such that boundaries of respective n/N periods of the data have different positions in the 1_UI (unit interval) data. - View Dependent Claims (11, 12, 13, 14)
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9. The data equalizing circuit according to claim B, wherein the data transition counting section comprises:
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a comparison part configured to compare adjacent values of the N number of latched data and generate N number of comparison signals; and a counter part configured to respectively count the N number of comparison signals and output the data transition frequencies for the n/N periods. - View Dependent Claims (10)
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15. A data equalizing method for controlling a correction degree of a data eye in response to a value of a control code including a plurality of bits, comprising:
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dividing n cycles of the data into N number of periods, and counting data transition frequencies for n/N periods while changing the value of the control code sequentially from a minimum value; calculating dispersion values of data transition frequencies for 1/N periods of the data of 1 UI (unit interval) from the data transition frequencies for the n/N periods according to respective values of the control code; and outputting the value of the control code when a dispersion value is largest among the dispersion values of the data transition frequencies for the 1/N periods, as a final control code, wherein n is equal to or greater than 2 and is set such that boundaries of the respective n/N periods of the data have different positions in the 1_UI data, wherein the step of dividing is performed by hardware. - View Dependent Claims (16, 17)
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Specification