Method of manufacturing a printed circuit board

• US 8,522,427 B2
• Filed: 12/29/2008
• Issued: 09/03/2013
• Est. Priority Date: 11/26/2004
• Status: Expired due to Fees

• Current Assignee: Nitto Denko Corporation
• Original Assignee: Nitto Denko Corporation
• Inventors: Ookawa, Tadao, Honjo, Mitsuru, Oda, Takashi
• Primary Examiner(s): PHAN, THIEM D
• Application Number:
  US12/345,134
• Publication Number:
  US 20090106975A1
• Time in Patent Office: 1,709 Days
• Field of Search: 298/46, 298/14, 298/25, 298/31, 298/40, 298/52, 427/97.2, 427/97.5, 427/98.1, 427/98.8, 427/536, 427/558, 216/17, 216/20, 216/36
• US Class Current: 29/846
• CPC Class Codes: H05K 1/0393 Flexible materials H05K1/038 takes precedence; specific organic compositions are classified in H05K1/0313 and subgroups
• CPC Class Codes: H05K 2203/025 Abrading, e.g. grinding or sand blasting
• CPC Class Codes: H05K 2203/095 Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
• CPC Class Codes: H05K 3/002 by liquid chemical etching
• CPC Class Codes: H05K 3/0041 by plasma etching
• CPC Class Codes: H05K 3/108 by semi-additive methods; masks therefor characterised by metallic etch mask H05K3/062; electroplating methods or apparatus H05K3/241
• CPC Class Codes: H05K 3/22 Secondary treatment of printed circuits H05K3/1283 takes precedence; embedding circuits in grooves by pressure H05K3/107
• CPC Class Codes: H05K 3/281 by means of a preformed insulating foil H05K3/284 takes precedence
• CPC Class Codes: H05K 3/381 by special treatment of the substrate
• CPC Class Codes: H05K 3/386 by the use of an organic polymeric bonding layer, e.g. adhesive
• CPC Class Codes: H05K 3/388 by the use of a metallic or inorganic thin film adhesion layer
• CPC Class Codes: Y10T 29/49117 Conductor or circuit manufacturing
• CPC Class Codes: Y10T 29/49128 Assembling formed circuit to base
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base
• CPC Class Codes: Y10T 29/53504 One work part comprising paper clip

Abstract

A multi-layer structure including a base insulating layer and a thin metal film layer (seed layer) is prepared. A plating resist layer is formed to have a prescribed pattern on the upper surface of the thin metal film layer. A metal plating layer is formed on the thin metal film layer exposed by electroplating. Then, the plating resist layer is removed, and the thin metal film layer in the region having the plating resist layer is removed. In this way, a conductive pattern including the thin metal film layer and the metal plating layer is formed. The upper surface of the base insulating layer in the region without the conductive pattern is subjected to roughening treatment. A cover insulating layer is formed on the upper surfaces of the base insulating layer and the conductive pattern. In this way, a printed circuit board is completed.

Claims

1. A method of manufacturing a printed circuit board, comprising the steps of:

forming a conductive layer having a prescribed pattern on one or both major surfaces of a first insulating layer, the conductive layer including a metal plating layer formed on a thin metal film layer;

roughening the major surface of said first insulating layer having said conductive layer thereon after the step of forming the conductive layer having the prescribed pattern, said roughening taking place only in a region of the major surface of said first insulating layer where the conductive layer is not present, a surface roughness of the roughened region of the major surface of the first insulating layer being at least 0.1 μ

m; and

forming a second insulating layer on the one or both major surfaces of said first insulating layer such that said second insulating layer covers said conductive layer and comes into contact with the roughened region of the major surface of said first insulating layer.

2. The method according to claim 1, wherein said step of roughening comprises the step of roughening said first insulating layer by wet etching, wet blasting or dry etching process.

3. The method according to claim 1, wherein said step of forming a conductive layer having a prescribed pattern comprises the step of forming said conductive layer including a thin metal film layer so that said thin metal film layer is in contact with one or both surfaces of said first insulating layer.

4. A method of manufacturing a printed circuit board, comprising the steps of:

forming a conductive layer having a prescribed pattern on at least one of two major surfaces of a first insulating layer such that said at least one of the two major surfaces of said first insulating layer comprises at least one area where said conductive layer is present and at least one area where said conductive layer is not present, the conductive layer including a metal plating layer formed on a thin metal film layer;

after the step of forming the conductive layer having the prescribed pattern, roughening the one area of said first insulating layer where said conductive layer is not present without roughening the one area of said first insulating layer where said conductive layer is present surface roughness of the roughened area of the first insulating layer being at least 0.1 μ

m; and

forming a second insulating layer on the at least one of the two major surfaces of said first insulating layer such that said second insulating layer covers said conductive layer and comes into contact with the roughened area of said first insulating layer.

5. A method of manufacturing a printed circuit board, comprising the steps of:

forming a first conductive layer in a first region on one major surface of a first insulating layer and forming a second conductive layer in a second region on the one major surface of the first insulating layer, the first and second conductive layers being spaced apart from each other, each of the first and second conductive layers including a metal plating layer formed on a thin metal film layer;

after the step of forming the first and second conductive layers, roughening a third region of the first insulating layer that extends between the first and second regions without roughening of the first and second regions, a surface roughness of the roughened third region being at least 0.1 μ

m; and

forming a second insulating layer on the one major surface of the first insulating layer such that the second insulating layer covers the first and second conductive layers and comes into contact with the roughened third region.