MEMS on-chip inertial navigation system with error correction

• US 8,522,612 B1
• Filed: 03/02/2012
• Issued: 09/03/2013
• Est. Priority Date: 02/05/2008
• Status: Active Grant

• Current Assignee: HRL Laboratories LLC (The Boeing Co.)
• Original Assignee: HRL Laboratories LLC (The Boeing Co.)
• Inventors: Kubena, Randall L.
• Primary Examiner(s): Macchiarolo, Peter
• Assistant Examiner(s): Shah, Samir M
• Application Number:
  US13/410,998
• Time in Patent Office: 550 Days
• Field of Search: 735/040.4, 734/97, 735/033, 735/040.2, 735/040.3, 735/040.8, 735/041.8, 735/141.6
• US Class Current: 73/504.04
• CPC Class Codes: G01C 19/5684 the devices involving a micromechanical structure

Abstract

An on-chip navigation system, optionally combined with GPS (Global Positioning System) and/or an imaging array, which incorporates MEMS (MicroElectroMechanical Systems) components is possible by the use of careful material selection and novel bonding techniques used during fabrication. The use of MEMS components permits many of the components of a typical inertial navigation system to reside on a single chip. Because the components are in close proximity, the components can then be used to monitor the environmental changes of the chip, such as temperature and vibration, and correct for the resulting offsets of other components. This allows improved system performance even if the individual sensor components are not ideal.

Claims

1. A process for fabricating an on-chip inertial navigation system apparatus, the process comprising:

providing a semiconductor substrate;

depositing an oscillator on the semiconductor substrate, the oscillator including a resonator being composed of a first material;

bonding a gyroscope resonator wafer to the semiconductor substrate with a low temperature bonding technique, the gyroscope resonator wafer being composed of a second material; and

etching the gyroscope resonator wafer after it is bonded to the semiconductor substrate and after the oscillator is deposited on the semiconductor substrate, the etching using an etching technique that will etch the second material but not etch the first material, the etching forming a gyroscope.

2. The process of claim 1, wherein the first material is quartz and the second material is silicon.

3. The process of claim 2, wherein the etching technique is fluorine-based plasma deep reactive ion etching.

4. The process of claim 1, wherein the low-temperature bonding technique includes Au—

In compression bonding.

5. The process of claim 4, wherein the Au—

In compression bonding includes a temperature between 100 and 300 degrees Celsius and a pressure no greater than 0.0001 Torr.

6. The process of claim 1, further comprising sealing the gyroscope and the oscillator under a cover.

7. The process of claim 6, wherein the sealing includes wafer-level vacuum with a getter.

8. A process for making an on-chip inertial navigation system apparatus, the process comprising:

providing a semiconductor substrate;

forming an oscillator on the semiconductor substrate, the oscillator including a resonator being composed of a first material;

bonding a gyroscope resonator wafer to the semiconductor substrate, the gyroscope resonator wafer being composed of a second material different from said first material; and

etching the gyroscope resonator wafer after it is bonded to the semiconductor substrate and after the oscillator is formed on the semiconductor substrate using an etching technique that will etch the second material but not etch the first material, the etching forming a gyroscope.

9. The process of claim 8, wherein the first material is quartz and the second material is silicon.

10. The process of claim 9, wherein the etching technique is fluorine-based plasma deep reactive ion etch.

11. The process of claim 8, wherein the bonding step includes forming an Au—

In compression bond.

12. The process of claim 11, wherein the Au—

In compression bond is formed at a temperature between 100 and 300 degrees Celsius and at a pressure no greater than 0.0001 Torr.

13. The process of claim 8, further comprising sealing the gyroscope and the oscillator under a cover.

14. The process of claim 13, wherein the sealing step includes wafer-level vacuum with a getter.