Flexible semiconductor device

• US 8,525,172 B2
• Filed: 11/28/2012
• Issued: 09/03/2013
• Est. Priority Date: 08/04/2008
• Status: Active Grant

• Current Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Hirano, Koichi, Nakatani, Seiichi, Ogawa, Tatsuo, Ichiryu, Takashi, Suzuki, Takeshi
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): DUONG, KHANH B
• Application Number:
  US13/687,105
• Publication Number:
  US 20130168677A1
• Time in Patent Office: 279 Days
• Field of Search: None
• US Class Current: 257/57
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78651 Silicon transistors H01L29/78606 - H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A method for manufacturing a flexible semiconductor device includes (i) forming an insulating film on the upper surface of metal foil, (ii) forming an extraction electrode pattern on the upper surface of the metal foil, (iii) forming a semiconductor layer on the insulating film such that the semiconductor layer is in contact with the extraction electrode pattern, (iv) forming a sealing resin layer on the upper surface of the metal foil such that the sealing resin layer covers the semiconductor layer and the extraction electrode pattern, and (v) forming electrodes by etching the metal foil, the metal foil being used as a support for the insulating film, the extraction electrode pattern, the semiconductor layer, and the sealing resin layer formed in (i) to (iv) and used as a constituent material for the electrodes in (v). The metal foil need not be stripped, and a high-temperature process can be used.

Claims

1. A flexible semiconductor device comprising;

an insulating film,

a semiconductor layer which is formed on the upper surface of the insulating film,

one or more electrodes located at the lower surface side of the insulating film,

one or more patterns of source/drain extraction electrodes which electrically connect the electrode with the semiconductor layer, and

a sealing resin layer which seals the patterns of extraction electrodes and the semiconductor layer,

wherein the one or more electrodes are provided by etching a metal foil which functioned as a substrate for each of the insulating film, the semiconductor layer, the patterns of extraction electrodes and the sealing resin layer.

2. The flexible semiconductor device according to claim 1, wherein the one or more electrodes have a tapered shape in the direction of thickness thereof.

3. The flexible semiconductor device according to claim 1, wherein the one or more electrodes have a thickness in a range from 4 μ

m to about 20 μ

m.

4. The flexible semiconductor device according to claim 1, wherein the one or more electrodes formed by etching the metal foil are each a source electrode, a drain electrode and a gate electrode, and wherein each of the source electrode, the drain electrode and the gate electrode is located coplanar with each other.

5. The flexible semiconductor device according to claim 1, wherein the one or more electrodes formed by etching the metal foil are each a source electrode and a drain electrode,

wherein the device comprises a gate electrode on the upper surface of the sealing resin layer so that the gate electrode opposes to the semiconductor layer across the sealing resin layer, wherein the gate electrode is formed by etching a metal foil other than the above metal foil, and wherein the gate electrode is located on a surface plane which is not flush with the surface plane of the source electrode and the drain electrode.

6. The flexible semiconductor device according to claim 1, wherein the one or more electrodes formed by etching the metal foil are each a source electrode and a drain electrode, and wherein the peripheral portions of the lower surface of the semiconductor layer partially contact with the peripheral portions of the upper surface of each of the patterns of source/drain extraction electrodes.

7. The flexible semiconductor device according to claim 1, wherein the one or more electrodes formed by etching the metal foil are each a source electrode and a drain electrode, and wherein the peripheral portions of the upper surface of the semiconductor layer partially contact with the peripheral portions of the lower surface of each of the patterns of source/drain extraction electrodes.

8. The flexible semiconductor device according to claim 1, wherein the one or more electrodes are each a gate electrode, a source electrode and a drain electrode, and wherein the device comprises at least two TFT elements each of which comprises an insulating film, a semiconductor layer, a gate electrode, a source electrode and a drain electrode.