High-frequency switching transistor and high-frequency circuit

• US 8,525,272 B2
• Filed: 04/10/2009
• Issued: 09/03/2013
• Est. Priority Date: 11/05/2004
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Losehand, Reinhard, Taddiken, Hans, Gerlach, Udo
• Primary Examiner(s): Pham, Long
• Application Number:
  US12/421,920
• Publication Number:
  US 20090278206A1
• Time in Patent Office: 1,607 Days
• Field of Search: 257/373, 257/376, 257/E29.012, 257/E29.013
• US Class Current: 257/376
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/1083 with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
• CPC Class Codes: H01L 29/1087 characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
• CPC Class Codes: H03K 17/6871 the output circuit comprising more than one controlled field-effect transistor
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00

Abstract

A switching transistor includes a substrate having a substrate dopant concentration and a barrier region bordering on the substrate, having a first conductivity type and having a barrier region dopant concentration that is higher than the substrate dopant concentration. A source region is embedded in the barrier region, and has a second conductivity type and has a dopant concentration that is higher than the barrier region dopant concentration. A drain region is embedded in the barrier region and is offset from the source region. The draining region has the second conductivity type and a dopant concentration that is higher than the barrier region dopant concentration. A channel region extends between the source region and the drain region, wherein the channel region comprises a subregion of the barrier region. An insulation region covers the channel region and is disposed between the channel region and a gate electrode. The barrier region dopant concentration and the substrate dopant concentration are chosen for generating a space-charge region around the source region and the drain region and for depleting the barrier region.

Claims

1. A high-frequency switching transistor comprising:

a substrate having a substrate dopant concentration;

a barrier region bordering on the substrate, comprising a first conductivity type and having a barrier region dopant concentration, which is higher than the substrate dopant concentration;

a source region embedded in the barrier region, comprising a second conductivity type different to the first conductivity type, and having a source region dopant concentration, which is higher than the barrier region dopant concentration;

a drain region embedded in the barrier region and disposed offset from the source region, comprising the second conductivity type and having a dopant concentration, which is higher than the barrier region dopant concentration;

a channel region extending between the source region and the drain region, wherein the channel region comprises a subregion of the barrier region;

an insulation region, which covers the channel region and is disposed between the channel region and a gate electrode;

wherein the barrier region dopant concentration and the substrate dopant concentration are chosen for generating a space-charge region around the source region and the drain region and for depleting the barrier region.

2. The high-frequency switching transistor according to claim 1, further comprising a partial circuit which is formed to apply an external voltage between the source region and the substrate and between the drain region and the substrate for depleting the barrier region.

3. The high-frequency switching transistor according to claim 1, wherein the first conductivity type comprises a p doped semiconductor material and the second conductivity type comprises an n doped semiconductor material.

4. The high-frequency switching transistor according to claim 1, wherein the first conductivity type comprises an n doped semiconductor material and the second conductivity type a p doped semiconductor material.

5. The high-frequency switching transistor according to claim 1, wherein the substrate dopant concentration is lower than 10¹⁴ dopant atoms per cubic centimeter.

6. The high-frequency switching transistor according to claim 3, wherein the drain region dopant concentration, the source region dopant concentration or a substrate terminal region dopant concentration is higher than 10¹⁸ dopant atoms per cubic centimeter.

7. The high-frequency switching transistor according to claim 1, wherein the barrier region dopant concentration lies between 10¹⁴ and 10¹⁸ dopant atoms per cubic centimeters.

8. The high-frequency switching transistor according to claim 1, wherein a thickness of the barrier region between the drain region and the substrate or a thickness of the barrier region between the source region and the substrate lies in a range of values between 0.05 μ

m and 1 μ

m.

9. A high-frequency circuit, comprising:

a switch with a high-frequency switching transistor, comprising,

a substrate having a substrate dopant concentration,

a barrier region bordering on the substrate, comprising

a first conductivity type and having a barrier region dopant concentration which is higher than the substrate dopant concentration,

a source region embedded in the barrier region, comprising a second conductivity type different to the first conductivity type, and having a source region dopant concentration which is higher than the barrier region dopant concentration,

a drain region embedded in the barrier region and disposed offset from the source region, comprising the second conductivity type and having a dopant concentration which is higher than the barrier region dopant concentration,

a channel region extending between the source region and the drain region, wherein the channel region comprises a subregion of the barrier region, and

an insulation region, which covers the channel region and is disposed between the channel region and a gate electrode;

wherein the barrier region dopant concentration and the substrate dopant concentration are chosen for generating a space-charge region around the source region and the drain region and for depleting the barrier region; and

a control circuit configured to open and close the switch depending on a control signal, and operably coupled to provide the gate electrode with a potential for opening the switch, the control circuit further operable to enable a current flow between the source region and the drain region.

10. The high-frequency circuit according to claim 9, wherein the substrate dopant concentration is lower than 10¹⁴ dopant atoms per cubic centimeter.

11. The high-frequency circuit according to claim 9, wherein the drain region dopant concentration, the source region dopant concentration or a substrate terminal region dopant concentration is higher than 10¹⁸ dopant atoms per cubic centimeter.

12. A high-frequency circuit with a high-frequency switching transistor, comprising:

a substrate having a substrate dopant concentration;

a barrier region bordering on the substrate, comprising a first conductivity type and having a barrier region dopant concentration which is higher than the substrate dopant concentration;

a source region embedded in the barrier region, comprising a second conductivity type different to the first conductivity type, and having a source region dopant concentration which is higher than the barrier region dopant concentration;

a drain region embedded in the barrier region and disposed offset from the source region, comprising the second conductivity type and having a dopant concentration which is higher than the barrier region dopant concentration;

a channel region extending between the source region and the drain region, wherein the channel region comprises a subregion of the barrier region; and

an insulation region, which covers the channel region and is disposed between the channel region and a gate electrode; and

wherein the high-frequency circuit is formed to provide a substrate of the high-frequency transistor with an offset voltage in relation to the source region and the drain region, wherein the offset voltage is chosen for generating a space-charge region around the Source region and the drain region and for depleting the barrier region.

13. The high-frequency circuit according to claim 12, wherein a gate is connected to a node via a resistor, which is connected to a second circuit formed to provide a gate electrode with a voltage for opening or closing the high-frequency switching transistor.

14. The high-frequency circuit according to claim 12, wherein the source region of a high-frequency switching transistor is connected to a potential terminal via a first resistor, and the drain region of the high-frequency switching transistor is connected to the potential terminal via a second resistor.