Semiconductor device

• US 8,525,294 B2
• Filed: 07/02/2009
• Issued: 09/03/2013
• Est. Priority Date: 09/18/2008
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Tada, Akira, Okada, Yoshinori, Tanabe, Hiroki, Kudo, Ikuo
• Primary Examiner(s): Toledo, Fernando L
• Assistant Examiner(s): HALL, VICTORIA KATHLEEN
• Application Number:
  US13/119,366
• Publication Number:
  US 20110272781A1
• Time in Patent Office: 1,524 Days
• Field of Search: 336/200, 257/E23.141, 257/E23.151, 257/E23.169, 257/E23.175, 257/277, 257/E21.022, 257/531, 296/04
• US Class Current: 257/531
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06531 Non-galvanic coupling, e.g. capacitive coupling
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

A package-on-package includes a semiconductor package, and a coil provided at the semiconductor package. The semiconductor package includes a bottom face, and a solder ball protruded from the bottom face. An axis of the coil is inclined with respect to the normal line of the bottom face.

Claims

1. A semiconductor device comprising:

a semiconductor package including a main plane and a connection electrode protruding from said main plane, and

a coil having at least a portion provided at said semiconductor package,

said coil having an axis inclined with respect to a normal line of said main plane,

wherein said coil is configured to be directly connected to a wiring of a substrate where said semiconductor package is mounted, and to be electrically connected to a coil of another semiconductor device through said wiring.

2. The semiconductor device according to claim 1, wherein the axis of said coil is orthogonal to the normal line of said main plane.

3. The semiconductor device according to claim 1, wherein said coil has at least a portion configured by a conducting wire.

4. The semiconductor device according to claim 1, further comprising an upper semiconductor package mounted on said semiconductor package, and including an upper connection electrode electrically connected with said semiconductor package,

wherein at least a portion of said coil is configured by said upper connection electrode.

5. The semiconductor device according to claim 4, wherein at least a portion of said coil is configured by a conductor layer formed in said semiconductor package, and an upper conductor layer formed in said upper semiconductor package.

6. The semiconductor device according to claim 1, wherein

said semiconductor package includes a plurality of stacked semiconductor chips, and a through electrode electrically connecting each of said plurality of semiconductor chips with each other by penetrating each of said semiconductor chips in accordance with said normal line, and

at least a portion of said coil is configured by said through electrode.

7. The semiconductor device according to claim 1, wherein wireless communication is carried out based on a change in a magnetic field generated by said coil.