Demodulation circuit and RFID tag including the demodulation circuit

• US 8,525,585 B2
• Filed: 07/26/2012
• Issued: 09/03/2013
• Est. Priority Date: 02/19/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Matsuzaki, Takanori, Shionoiri, Yutaka
• Primary Examiner(s): Chang, Joseph
• Assistant Examiner(s): SHIN, JEFFREY M
• Application Number:
  US13/558,694
• Publication Number:
  US 20120286268A1
• Time in Patent Office: 404 Days
• Field of Search: 329311-314, 329/347, 329/370
• US Class Current: 329/347
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H03D 1/18 of semiconductor devices

Abstract

An object is to provide a demodulation circuit having a sufficient demodulation ability. Another object is to provide an RFID tag which uses a demodulation circuit having a sufficient demodulation ability. A material which enables a reverse current to be small enough, for example, an oxide semiconductor material, which is a wide bandgap semiconductor, is used in part of a transistor included in a demodulation circuit. By using the semiconductor material which enables a reverse current of a transistor to be small enough, a sufficient demodulation ability can be secured even when an electromagnetic wave having a high amplitude is received.

Claims

1. A semiconductor device comprising:

a first transistor comprising a channel formation region including an oxide semiconductor;

a second transistor comprising a channel formation region including an oxide semiconductor;

a first capacitor; and

a second capacitor,

wherein a gate of the first transistor and one terminal of the first capacitor are electrically connected to each other,

wherein one of a source and a drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to each other,

wherein a gate of the second transistor and the other of the source and the drain of the second transistor are electrically connected to each other,

wherein the other of the source and the drain of the first transistor and one terminal of the second capacitor are electrically connected to each other.

2. The semiconductor device according to claim 1,

wherein a reference potential is supplied to a node which is electrically connected to the gate of the second transistor and the other of the source and the drain of the second transistor.

3. The semiconductor device according to claim 1,

wherein a reference potential is supplied to the other of the source and the drain of the first transistor.

4. The semiconductor device according to claim 1,

wherein the oxide semiconductor is selected from the group consisting of In—

Sn—

Ga—

Zn—

O based oxide semiconductor, In—

Ga—

Zn—

O based oxide semiconductor, In—

Sn—

Zn—

O based oxide semiconductor, In—

Al—

Zn—

O based oxide semiconductor, Sn—

Ga—

Zn—

O based oxide semiconductor, Al—

Ga—

Zn—

O based oxide semiconductor, Sn—

Al—

Zn—

O based oxide semiconductor, In—

Zn—

O based oxide semiconductor, Sn—

Zn—

O based oxide semiconductor, Al—

Zn—

O based oxide semiconductor, Zn—

Mg—

O based oxide semiconductor, Sn—

Mg—

O based oxide semiconductor, In—

Mg—

O based oxide semiconductor, In—

O based oxide semiconductor, Sn—

O based oxide semiconductor, and Zn—

O based oxide semiconductor.

5. A semiconductor device comprising:

a first transistor comprising a semiconductor material with an energy gap of larger than 3 eV;

a second transistor comprising a semiconductor material with an energy gap of larger than 3 eV;

a first capacitor; and

a second capacitor,

wherein a gate of the first transistor and one terminal of the first capacitor are electrically connected to each other,

wherein one of a source and a drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to each other,

wherein a gate of the second transistor and the other of the source and the drain of the second transistor are electrically connected to each other,

wherein the other of the source and the drain of the first transistor and one terminal of the second capacitor are electrically connected to each other.

6. The semiconductor device according to claim 5,

wherein a reference potential is supplied to a node which is electrically connected to the gate of the second transistor and the other of the source and the drain of the second transistor.

7. The semiconductor device according to claim 5,

wherein a reference potential is supplied to the other of the source and the drain of the first transistor.

8. The semiconductor device according to claim 5,

wherein the semiconductor material is selected from the group consisting of In—

Sn—

Ga—

Zn—

O based oxide semiconductor, In—

Ga—

Zn—

O based oxide semiconductor, In—

Sn—

Zn—

O based oxide semiconductor, In—

Al—

Zn—

O based oxide semiconductor, Sn—

Ga—

Zn—

O based oxide semiconductor, Al—

Ga—

Zn—

O based oxide semiconductor, Sn—

Al—

Zn—

O based oxide semiconductor, In—

Zn—

O based oxide semiconductor, Sn—

Zn—

O based oxide semiconductor, Al—

Zn—

O based oxide semiconductor, Zn—

Mg—

O based oxide semiconductor, Sn—

Mg—

O based oxide semiconductor, In—

Mg—

O based oxide semiconductor, In—

O based oxide semiconductor, Sn—

O based oxide semiconductor, and Zn—

O based oxide semiconductor.

9. A semiconductor device comprising:

a first transistor comprising a channel formation region including a silicon carbide;

a second transistor comprising a channel formation region including a silicon carbide;

a first capacitor; and

a second capacitor,

wherein a gate of the first transistor and one terminal of the first capacitor are electrically connected to each other,

wherein one of a source and a drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to each other,

wherein a gate of the second transistor and the other of the source and the drain of the second transistor are electrically connected to each other,

wherein the other of the source and the drain of the first transistor and one terminal of the second capacitor are electrically connected to each other.

10. The semiconductor device according to claim 9,

wherein a reference potential is supplied to a node which is electrically connected to the gate of the second transistor and the other of the source and the drain of the second transistor.

11. The semiconductor device according to claim 9,

wherein a reference potential is supplied to the other of the source and the drain of the first transistor.

12. A semiconductor device comprising:

a first transistor comprising a channel formation region including silicon carbide;

a second transistor comprising a channel formation region including silicon carbide; and

a capacitor;

wherein a gate of the first transistor, a drain of the first transistor, and a source of the second transistor are electrically connected to one another,

wherein a gate of the second transistor, a drain of the second transistor, and one terminal of the capacitor are electrically connected to one another,

wherein a source of the first transistor and the other terminal of the capacitor are electrically connected to each other.

13. The semiconductor device according to claim 12,

wherein a reference potential is supplied to a node which is electrically connected to the gate of the second transistor, the drain of the second transistor and the one terminal of the capacitor.