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Memory device and manufacturing method the same

  • US 8,526,216 B2
  • Filed: 07/11/2012
  • Issued: 09/03/2013
  • Est. Priority Date: 03/28/2005
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a first driver circuit;

    a second driver circuit; and

    a memory cell including a first wiring, a second wiring, a transistor, a first conductive layer, a layer, and a second conductive layer, the transistor having a semiconductor film including a channel formation region,wherein the first wiring is electrically connected to the first driver circuit,wherein the second wiring is electrically connected to the second driver circuit,wherein the semiconductor film includes a metal oxide and the metal oxide includes indium,wherein the first conductive layer is electrically connected to the transistor,wherein each of the layer and the second conductive layer is located over the transistor,wherein the first conductive layer is overlapped with the second conductive layer, andwherein the layer is interposed between the first conductive layer and the second conductive layer.

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