Semiconductor memory device and method of operating the same
First Claim
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1. A semiconductor memory device, comprising:
- a memory string coupled to a bit line;
a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation; and
a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string.
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Abstract
A semiconductor memory device includes a memory string coupled to a bit line, a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation, and a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string.
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Citations
18 Claims
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1. A semiconductor memory device, comprising:
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a memory string coupled to a bit line; a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation; and a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of operating a semiconductor memory device, the method comprising:
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performing an erase operation on a memory string coupled to a bit line; after the erase operation, setting a level of a sensing current to a first level and performing an erase verification operation for verifying a stored data in a selected memory cell of the memory string; performing a program operation on the selected memory cell; and after the program operation, setting a level of the sensing current for a program verification operation to one of several program levels which is higher than the first level and performing the program verification operation for verifying the stored data in the memory cell. - View Dependent Claims (13)
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14. A method of operating a semiconductor memory device, the method comprising:
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performing an erase operation on a memory string coupled to a bit line; precharging the bit line to a first bit line voltage after the erase operation; performing an erase verification operation by sensing a change of a voltage of the bit line; performing a program operation on a selected memory cell; precharging the bit line to one of several bit line voltages, which is higher than the first bit line voltage, after the program operation; and performing a program verification operation by sensing a change of a voltage of the bit line. - View Dependent Claims (15)
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16. A method of operating a semiconductor memory device, the method comprising:
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performing an erase operation on a memory string coupled to a bit line; precharging the bit line after performing the erase operation; performing an erase verification operation by sensing a change of a voltage of the bit line after an evaluation time having a first value; performing a program operation on a selected memory cell; precharging the bit line after performing the program operation; and performing a program verification operation by sensing a change of a voltage of the bit line after an evaluation time having one value of several values, which is less than the first value. - View Dependent Claims (17, 18)
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Specification