Method for manufacturing semiconductor device

• US 8,530,285 B2
• Filed: 12/22/2010
• Issued: 09/10/2013
• Est. Priority Date: 12/28/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Hirohashi, Takuya, Takahashi, Masahiro, Shimazu, Takashi
• Primary Examiner(s): Lee, Hsien Ming
• Application Number:
  US12/976,388
• Publication Number:
  US 20110156026A1
• Time in Patent Office: 993 Days
• Field of Search: 438/149, 438/150, 438/154, 438/187, 438/198, 438/285, 438/308, 438/608, 438/104, 257/57, 257/69, 257/213, 257/E29.296, 257/E29.273, 257/E21.09, 257/E29.068
• US Class Current: 438/149
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/02472 Oxides
• CPC Class Codes: H01L 21/02483 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/02631 Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/66742 Thin film unipolar transistors
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.

Claims

1. A method for manufacturing a semiconductor device comprising:

forming a first multi-component oxide semiconductor layer over a substrate;

forming a single-component oxide semiconductor layer over the first multicomponent oxide semiconductor layer;

performing a first heat treatment to form a single-component oxide semiconductor layer including single crystal regions and to perform crystal growth of the first multi-component oxide semiconductor layer from the single-component oxide semiconductor layer including single crystal regions so as to form a first multicomponent oxide semiconductor layer including single crystal regions;

forming a second multi-component oxide semiconductor layer over the single-component oxide semiconductor layer including single crystal regions; and

performing a second heat treatment to form a second multi-component oxide semiconductor layer including single crystal regions.

2. The method for manufacturing a semiconductor device according to claim 1, further comprising:

etching a stack of the first multi-component oxide semiconductor layer, the single-component oxide semiconductor layer, and the second multi-component oxide semiconductor layer into an island-shape;

forming a source electrode and a drain electrode over the stack;

forming a gate insulating layer over the source electrode and the drain electrode; and

forming a gate electrode over the gate insulating layer.

3. The method for manufacturing a semiconductor device according to claim 1, further comprising:

forming a gate electrode and a gate insulating layer over the substrate before formation of the first multi-component oxide semiconductor layer;

etching a stack of the first multi-component oxide semiconductor layer, the single-component oxide semiconductor layer, and the second multi-component oxide semiconductor layer into an island-shape; and

forming a source electrode and a drain electrode over the stack.

4. The method for manufacturing a semiconductor device according to claim 1, wherein each of the first heat treatment and the second heat treatment is performed at higher than or equal to 500°

C. and lower than or equal to 1000°

C.

5. The method for manufacturing a semiconductor device according to claim 1, wherein crystal growth of the first multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the single crystal regions in the first multi-component oxide semiconductor layer.

6. The method for manufacturing a semiconductor device according to claim 1, wherein crystal growth of the second multi-component oxide semiconductor layer is carried out using the single-component oxide semiconductor layer including single crystal regions as a seed crystal to form the single crystal regions in the second multi-component oxide semiconductor layer.

7. The method for manufacturing a semiconductor device according to claim 1, wherein each of the single-component oxide semiconductor layer including single crystal regions, the first multi-component oxide semiconductor layer including single crystal regions, and the second multi-component oxide semiconductor layer including single crystal regions has an a-b plane parallel to a surface of the substrate and a c-axis perpendicular to the surface of the substrate.

8. The method for manufacturing a semiconductor device according to claim 1, wherein the single-component oxide semiconductor layer has a hexagonal crystal structure.

9. The method for manufacturing a semiconductor device according to claim 1, wherein the single-component oxide semiconductor layer comprises zinc oxide.

10. The method for manufacturing a semiconductor device according to claim 1, wherein each of the single-component oxide semiconductor layer including single crystal regions, the first multi-component oxide semiconductor layer including single crystal regions, and the second multi-component oxide semiconductor layer including single crystal regions is dehydrated or dehydrogenated.

11. The method for manufacturing a semiconductor device according to claim 1, wherein a carrier density of each of the single-component oxide semiconductor layer including single crystal regions, the first multi-component oxide semiconductor layer including single crystal regions, and the second multi-component oxide semiconductor layer including single crystal regions is lower than 1×

10¹⁴ cm<sup>−

3</sup>.

12. The method for manufacturing a semiconductor device according to claim 1, wherein a carrier density of each of the single-component oxide semiconductor layer including single crystal regions, the first multi-component oxide semiconductor layer including single crystal regions, and the second multi-component oxide semiconductor layer including single crystal regions is lower than 1.45×

10¹⁰ cm<sup>−

3</sup>.

13. The method for manufacturing a semiconductor device according to claim 1, wherein each of the single-component oxide semiconductor layer including single crystal regions, the first multi-component oxide semiconductor layer including single crystal regions, and the second multi-component oxide semiconductor layer including single crystal regions is intrinsic semiconductor.

14. The semiconductor device according to claim 1, wherein the second heat treatment is performed at higher than or equal to 150°

C. and lower than or equal to 400°

C.

15. A method for manufacturing a semiconductor device comprising:

forming a first multi-component oxide semiconductor layer over a substrate;

forming a single-component oxide semiconductor layer over the first multicomponent oxide semiconductor layer;

performing a heat treatment to form a single-component oxide semiconductor layer including single crystal regions and to perform crystal growth of the first multicomponent oxide semiconductor layer from the single-component oxide semiconductor layer including single crystal regions so as to form a first multi-component oxide semiconductor layer including single crystal regions; and

forming a second multi-component oxide semiconductor layer including single crystal regions over the single-component oxide semiconductor layer by a sputtering method while performing heating.

16. The semiconductor device according to claim 15, wherein the heating temperature of forming the second multi-component oxide semiconductor layer including single crystal regions is at 200°

C. to 600°

C.

17. The method for manufacturing a semiconductor device according to claim 15, further comprising:

etching a stack of the first multi-component oxide semiconductor layer, the single-component oxide semiconductor layer, and the second multi-component oxide semiconductor layer into an island-shape;

forming a source electrode and a drain electrode over the stack;

forming a gate insulating layer over the source electrode and the drain electrode; and

forming a gate electrode over the gate insulating layer.

18. The method for manufacturing a semiconductor device according to claim 15, further comprising:

forming a gate electrode and a gate insulating layer over the substrate before formation of the first multi-component oxide semiconductor layer;

etching a stack of the first multi-component oxide semiconductor layer, the single-component oxide semiconductor layer, and the second multi-component oxide semiconductor layer into an island-shape; and

forming a source electrode and a drain electrode over the stack.