Power semiconductor device and method therefor
First Claim
1. A semiconductor device comprising:
- a semiconductor material;
an active area;
a transistor including;
a gate over a first surface of the semiconductor material;
a source region in the active area;
a drain region;
a source electrode coupled to the source region;
a drain electrode coupled to the drain region; and
a channel region disposed between the source region and the drain region, wherein the channel region has an approximately constant doping profile;
a first layer of conductive material positioned over the first surface of the semiconductor material and adjacent to a portion of the gate of the transistor; and
a dielectric structure extending from the first surface of the semiconductor material into the semiconductor material, wherein at least a portion of the first layer of conductive material is positioned over the dielectric structure, wherein the dielectric structure is at least partially disposed between the first layer of conductive material and the drain region; and
wherein the dielectric structure includes a plurality of vertically extending dielectric structures separated by one or more cavities.
3 Assignments
0 Petitions
Accused Products
Abstract
A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a second electrode interconnection region overlying a second major surface. Each transistor cell has an approximately constant doping concentration in the channel region. A dielectric platform is used as an edge termination of an epitaxial layer to maintain substantially planar equipotential lines therein. The power transistor finds particular utility in radio frequency applications operating at a frequency greater than 500 megahertz and dissipating more than 5 watts of power. The semiconductor die and package are designed so that the power transistor can efficiently operate under such severe conditions.
109 Citations
44 Claims
-
1. A semiconductor device comprising:
-
a semiconductor material; an active area; a transistor including; a gate over a first surface of the semiconductor material; a source region in the active area; a drain region; a source electrode coupled to the source region; a drain electrode coupled to the drain region; and a channel region disposed between the source region and the drain region, wherein the channel region has an approximately constant doping profile; a first layer of conductive material positioned over the first surface of the semiconductor material and adjacent to a portion of the gate of the transistor; and a dielectric structure extending from the first surface of the semiconductor material into the semiconductor material, wherein at least a portion of the first layer of conductive material is positioned over the dielectric structure, wherein the dielectric structure is at least partially disposed between the first layer of conductive material and the drain region; and wherein the dielectric structure includes a plurality of vertically extending dielectric structures separated by one or more cavities. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
-
-
12. A semiconductor device comprising:
-
a semiconductor material; a first region of a first conductivity type in the semiconductor material; a second region of a second conductivity type in the semiconductor material adjacent to the first region, wherein the second region has a higher doping concentration than the semiconductor material, wherein the first region and the second region extend from a top surface of the semiconductor material into the semiconductor material, and wherein a depth of the second region relative to the top surface of the semiconductor material is approximately equal to a depth of the first region; a third region of the second conductivity type extending from the top surface of the semiconductor material into the semiconductor material; a conductive material over the first region; and a dielectric structure in the semiconductor material and adjacent to an area that includes the first region, wherein the dielectric structure extends from the top surface of the semiconductor material into the semiconductor material, and wherein the dielectric structure is at least partially disposed between the conductive material and the second region; wherein the dielectric structure includes a plurality of vertically extending dielectric structures separated by one or more cavities; wherein the semiconductor device comprises a transistor and wherein the transistor comprises; a portion of the semiconductor material; the first region, wherein a portion of the first region is a channel region of the transistor; the second region, wherein the second region and the portion of the semiconductor material are a drain region of the transistor and wherein the second region is adjacent to the first region; the third region, wherein the third region is a source region of the transistor; the conductive material, wherein the conductive material is a gate of the transistor, and wherein the conductive material is positioned over the top surface of the semiconductor material; and a gate interconnect coupled to the gate; wherein the source region is in the first region and the channel region of the transistor surrounds the source region of the transistor. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
-
-
30. A semiconductor device comprising:
-
a semiconductor material including a channel region, wherein the channel region has a substantially constant doping concentration profile; an active area in the semiconductor material; a first region of a first conductivity type in the active area extending from a first surface of the semiconductor material into the semiconductor material; a second region of a second conductivity type in the active area extending from the first surface of the semiconductor material into the semiconductor material; a third region of the second conductivity type in the active area extending from the first surface of the semiconductor material into the semiconductor material; a fourth region of the first conductivity type in the active area extending from the first surface of the semiconductor material into the semiconductor material; and a dielectric structure extending at least about four microns from a surface of the semiconductor material into the semiconductor material, wherein the dielectric structure is a structure surrounding the active area, wherein the fourth region is contiguous around the periphery of the active area and adjacent to the dielectric structure, wherein the dielectric structure is at least partially disposed between a gate of a transistor in the active area and the second region, and wherein the dielectric structure includes a plurality of vertically extending dielectric structures separated by one or more cavities. - View Dependent Claims (31, 32, 33, 34, 35, 36)
-
-
37. A semiconductor device comprising:
-
a semiconductor material; a vertical transistor including a gate, a drain region, a source region, and a channel region, wherein the channel region of the vertical transistor is in the semiconductor material and has a substantially constant doping concentration profile; and a dielectric structure extending from a first surface of the semiconductor material into the semiconductor material, wherein the dielectric structure is at least partially disposed between the gate and the drain region to reduce a capacitance between the gate and the drain region, and wherein the dielectric structure includes a plurality of vertically extending dielectric structures separated by one or more cavities. - View Dependent Claims (38, 39, 40, 41, 42, 43, 44)
-
Specification