Package for an implantable neural stimulation device

• US 8,532,776 B2
• Filed: 10/25/2007
• Issued: 09/10/2013
• Est. Priority Date: 04/28/2005
• Status: Active Grant

• Current Assignee: Cortigent Incorporated
• Original Assignee: Second Sight Medical Products, Inc.
• Inventors: Greenberg, Robert J, Ok, Jerry, Neysmith, Jordan Matthew, Wilkin, Kevin, Talbot, Neil Hamilton, Chang, Da-Yu
• Primary Examiner(s): Lavert, Nicole F
• Assistant Examiner(s): KIMBALL, JEREMIAH T
• Application Number:
  US11/924,469
• Publication Number:
  US 20080046021A1
• Time in Patent Office: 2,147 Days
• Field of Search: 607/2, 607/54
• US Class Current: 607/36
• CPC Class Codes: A61N 1/0543 Retinal electrodes
• CPC Class Codes: A61N 1/36046 of the eye
• CPC Class Codes: A61N 1/375 Constructional arrangements, e.g. casings
• CPC Class Codes: A61N 1/37518 Anchoring of the implants, e.g. fixation
• CPC Class Codes: A61N 1/3758 Packaging of the components within the casing
• CPC Class Codes: A61N 1/3787 from an external energy source
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/16251 Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
• CPC Class Codes: H01L 2924/19104 on the semiconductor or solid-state device, i.e. passive-on-chip
• CPC Class Codes: H01L 2924/19107 off-chip wires

Abstract

The present invention is an improved hermetic package for implantation in the human body. The implantable device of the present invention includes an eclectically non-conductive bass including electrically conductive vias through the substrate. A circuit is flip-chip bonded to a subset of the vias. A second circuit is wire bonded to another subset of the vias. Finally, a cover is bonded to the substrate such that the cover, substrate and vias form a hermetic package.

Claims

1. A method of making a hermetic package of an implantable device, comprising the steps of:

providing a substantially planar ceramic containing non-conductive substrate defining a plurality of vias having a substantially planar inside surface;

filling said vias with a metal containing ceramic paste, the vias and ceramic containing non-conductive substrate forming a base;

firing said base;

applying thin film traces to the ceramic substrate which are suitable to survive braze temperatures;

brazing a metallic ring to said substantially planar inside surface of said base;

flip-chip bonding inside the metallic ring and directly to said base an integrated circuit, which is not suitable to withstand braze temperatures, locating the integrated circuit at a distance and spaced apart from the metallic ring thus defining a region between the integrated circuit and the metallic ring, electrically connecting said integrated circuit to at least one of said vias and leaving at least one of the vias of the region between the integrated circuit and the metallic ring free for further electrical connections;

mounting a hybrid stack circuit on top of said integrated circuit;

wire bonding said hybrid stack circuit directly to said base and limitedly to said region between the integrated circuit and the metallic ring; and

welding a metallic top to said metallic ring forming the hermetic package, wherein said integrated circuit and said hybrid stack circuit are located within said hermetic package.

2. The method according to claim 1, further comprising depositing multi layer thin film metallization on said ceramic containing non-conductive substrate and said vias forming part of said base and electrically connecting said vias with said integrated and hybrid stack circuits.

3. A method of manufacturing a hermetic package of an implantable device comprising:

forming a substantially planar ceramic substrate including vias, having a substantially planar inside surface;

filling said vias with metal containing ceramic paste to form a base;

firing said base to form a hermetic seal across said vias;

applying multi layer thin film metallization to a top side of said ceramic substrate and said vias forming part of said base, the thin film metallization suitable to withstand braze temperatures;

brazing a metal ring to the substantially planar inside surface of said substantially planar ceramic substrate;

flip-chip bonding inside the metal ring and directly to said metal traces an integrated circuit, which is not suitable to withstand braze temperatures, locating the integrated circuit in a first zone of the ceramic substrate and defining a second zone of the ceramic substrate between the integrated circuit and the metal ring free for further subsequent electrical connections;

mounting a hybrid stack circuit on top of said integrated circuit;

wire bonding a said hybrid stack circuit directly to the second zone of said base between the integrated circuit and the metal ring; and

welding a metal lid to said metal ring forming the hermetic package, wherein said integrated circuit and said hybrid stack circuit are located within said hermetic package.

4. The method according to claim 3, wherein said step of welding is laser welding.

5. The method according to claim 3, wherein said hybrid stack circuit is a stack substrate including discrete components.

6. The method according to claim 3, further comprising underfilling said integrated circuit.

7. The method according to claim 3, further comprising placing a getter within said implantable device.

8. The method according to claim 3, further comprising baking out moisture in a vacuum.

9. The method according to claim 3, further comprising applying additional metal traces to a bottom side of said base.

10. The method according to claim 3, further comprising bump bonding said additional metal traces to an electrode array.

11. A method of making a hermetic package of an implantable device, comprising:

providing a substantially planar ceramic containing non-conductive substrate, having a substantially planar inside surface, including a plurality of conductive vias forming a base;

applying multi layer thin film metallization to a top side of said ceramic substrate and said vias forming part of said base, the thin film metallization suitable to withstand braze temperatures;

brazing a metallic ring to the substantially planar inside surface of said substantially planar ceramic substrate;

flip-chip bonding a integrated circuit, not suitable to withstand braze temperatures, directly to said base inside the metallic ring and limitedly to a zone of the base to define a free region of the base between the integrated circuit and the metallic ring;

mounting a hybrid stack circuit on top of said integrated circuit;

wire bonding said hybrid stack circuit directly to the free region of said base between the integrated circuit and the metallic ring; and

welding a metallic top to said metallic ring forming the hermetic package, wherein said integrated circuit and said hybrid stack circuit are located within said hermetic package.