Contact processing using multi-input/multi-output (MIMO) models
First Claim
1. A method for processing a wafer comprising:
- receiving, by a processing system, a first set of patterned wafers and associated contact-etch (CE) data, each patterned wafer having a plurality transistor stacks and a plurality of additional layers thereon;
selecting a first patterned wafer from the first set of patterned wafers;
establishing a first double-pattern-contact-etch (DPCE) processing sequence for the selected first patterned wafer using the CE data;
determining if the first DPCE processing sequence includes a first contact-etch procedure;
performing the first contact-etch procedure when the first DPCE processing sequence includes the first contact-etch procedure, wherein a second set of patterned wafers is created when the first contact-etch procedure is performed using the first set of patterned wafers;
performing a first corrective action when the first DPCE processing sequence does not include the first contact-etch procedure;
determining if the first DPCE processing sequence includes an Ion Energy Optimized (IEO)-etch procedure;
performing the IEO-etch procedure when the first DPCE processing sequence includes the IEO-etch procedure, wherein the IEO-etch procedure uses a new etch subsystem having a new process chamber configured therein; and
performing a new corrective action when the first DPCE processing sequence does not include the IEO-etch procedure.
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Accused Products
Abstract
The invention provides a systems and methods for creating Double Pattern (DP) structures on a patterned wafer in real-time using Dual Pattern Contact-Etch (DPCE) processing sequences and associated Contact-Etch-Multi-Input/Multi-Output (CE-MIMO) models. The DPCE processing sequences can include one or more contact-etch procedures, one or more measurement procedures, one or more contact-etch modeling procedures, and one or more contact-etch verification procedures. The CE-MIMO model uses dynamically interacting behavioral modeling between multiple layers and/or multiple contact-etch procedures. The multiple layers and/or the multiple contact-etch procedures can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created during Double Patterning (DP) procedures.
39 Citations
19 Claims
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1. A method for processing a wafer comprising:
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receiving, by a processing system, a first set of patterned wafers and associated contact-etch (CE) data, each patterned wafer having a plurality transistor stacks and a plurality of additional layers thereon; selecting a first patterned wafer from the first set of patterned wafers; establishing a first double-pattern-contact-etch (DPCE) processing sequence for the selected first patterned wafer using the CE data; determining if the first DPCE processing sequence includes a first contact-etch procedure; performing the first contact-etch procedure when the first DPCE processing sequence includes the first contact-etch procedure, wherein a second set of patterned wafers is created when the first contact-etch procedure is performed using the first set of patterned wafers; performing a first corrective action when the first DPCE processing sequence does not include the first contact-etch procedure; determining if the first DPCE processing sequence includes an Ion Energy Optimized (IEO)-etch procedure; performing the IEO-etch procedure when the first DPCE processing sequence includes the IEO-etch procedure, wherein the IEO-etch procedure uses a new etch subsystem having a new process chamber configured therein; and performing a new corrective action when the first DPCE processing sequence does not include the IEO-etch procedure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method for processing a wafer using an Ion Energy (IE) controlled processing chamber, the method comprising:
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receiving, by a processing system, a first set of patterned wafers and associated Ion Energy (IE) data, each patterned wafer having a first patterned etch-mask layer and a plurality of additional layers thereon; determining an IE-related process sequence for the first set of patterned wafers using the IE data; determining a first set of subsystems configured to perform the IE-related process sequence, wherein the first set of subsystems includes an etch subsystem having a first Ion Energy Controlled (IEC) process chamber configured therein and a Multi-Input/Multi-Output (MIMO) controller coupled thereto; positioning a first patterned wafer on a first wafer holder in a first process chamber; creating a first Ion Energy Optimized (IEO) plasma in the first process chamber; and creating a new patterned wafer using a first contact-etch plasma, wherein first IE-sensor data is obtained while the new patterned wafer is created, wherein a first Ion Energy (IE) sensor is coupled to the first process chamber and is configured to obtain the first IE-sensor data. - View Dependent Claims (15)
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16. A method for establishing a Contact-Etch Multi-Input/Multi-Output (CE-MIMO) model for creating a plurality of Double Pattern (DP) structures on a patterned wafer, the method comprising:
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selecting a first Double Pattern Contact-Etch (DPCE) processing sequence and a first CE-MIMO model, a first contact-etch procedure in the first DPCE processing sequence being configured to create a plurality of contact structures on a second set of wafers using a patterned etch-mask layer on a first set of wafers, wherein the first CE-MIMO model is configured to simulate the first contact-etch procedure in the first DPCE processing sequence and includes a plurality of first Controlled Variables (CVs), a plurality of first Manipulated Variables (MVs), and a plurality of first Disturbance Variables (DVs); determining a first number (Na) of first Disturbance Variables (DV1a, DV2a, . . . DVNa) associated with the first CE-MIMO model, wherein Na is an integer greater than one and at least one first contact-etch procedure is configured to provide one or more of the first (DV1a, DV2a, . . . DVNa); determining a first number (La) of first (CV1a, CV2a, . . . CVLa), associated with the first CE-MIMO model and ranges associated with the first (CV1a, CV2a, . . . CVLa), wherein La is an integer greater than one and the first (CV1a, CV2a, . . . CVLa), include a first etch-mask width; establishing a first number (Ma) of first (MV1a, MV2a, . . . MVMa) associated with the first CE-MIMO model using one or more candidate process chambers, wherein Ma is an integer greater than one and the first (MV1a, MV2a, . . . MVMa), include one or more Within-Wafer Manipulated Variables (WiW-MVs) configured to change while a wafer is being processed, and one or more Wafer-to-Wafer- Manipulated Variables (W2W-MVs) configured to change after the wafer has been processed; analyzing the first CE-MIMO model, wherein one or more statistical models are selected, one or more ranges are provided for the first (CV1a, CV2a, . . . CVLa) and the first (MV1a, MV2a, . . . MVMa), and one or more statistical analysis procedures are performed to establish Design of Experiments (DOE) data, wherein the statistical models are configured to associate one or more of the first (MV1a, MV2a, . . . MVMa), with one or more of the first (CV1a, CV2a, . . . CVLa); determining one or more stability conditions for the first CE-MIMO model; and optimizing the first CE-MIMO model using performance parameters associated with a first set of processing tools configured to perform the first DPCE processing sequence. - View Dependent Claims (17, 18, 19)
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Specification